MC9RS08KA1 FREESCALE [Freescale Semiconductor, Inc], MC9RS08KA1 Datasheet - Page 29
MC9RS08KA1
Manufacturer Part Number
MC9RS08KA1
Description
RS08 Microcontrollers
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheets
1.MC9RS08KA2.pdf
(136 pages)
2.MC9RS08KA1.pdf
(136 pages)
3.MC9RS08KA1.pdf
(132 pages)
4.MC9RS08KA1.pdf
(132 pages)
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1
2
$020C–
$020F
$0210
$0211
$0212–
$0213
$0214–
$021F
$0220
$0221
$0222
$0223–
$023F
$3FF8
$3FF9
$3FFA
$3FFB
$3FFC
Address Register Name
Physical RAM in $000E can be accessed through D[X] register when the content of the index register X is $0E.
If using the MCU untrimmed, $3FFA and $3FFB may be used by applications.
4.5
The device includes two sections of static RAM. The locations from $0000 to $000D can be directly
accessed using the more efficient tiny addressing mode instructions and short addressing mode
instructions. Location $000E RAM can either be accessed through D[X] register when register X is $0E
or through the paging window location $00CE when PAGESEL register is $00. The second section of
RAM starts from $0020 to $004F, and it can be accessed using direct addressing mode instructions.
The RAM retains data when the MCU is in low-power wait and stop mode. RAM data is unaffected by any
reset provided that the supply voltage does not drop below the minimum value for RAM retention.
4.6
The Flash memory is intended primarily for program storage. In-circuit programming allows the operating
program to be loaded into the Flash memory after final assembly of the application product. It is possible
to program the entire array through the single-wire background debug interface. Because the device does
not include on-chip charge pump circuitry, external V
4.6.1
Features of the Flash memory include:
Freescale Semiconductor
2
2
Unimplemented
FOPT
FLCR
Reserved
Unimplemented
PTAPE
PTAPUD
PTASE
Unimplemented
Reserved
Reserved
Reserved
Reserved
NVOPT
RAM
Flash
Features
Bit 7
—
—
—
—
—
—
—
0
0
0
0
0
0
= Unimplemented or Reserved
Table 4-1. Register Summary (continued)
—
—
—
—
—
—
—
6
0
0
0
0
0
0
MC9RS08KA2 Series Data Sheet, Rev. 2
PTAPUD5
PTAPE5
PTASE5
—
—
—
—
—
—
—
5
0
0
0
Reserved for Room Temperature ICS Trim
PP
PTAPUD4
Reserved
PTAPE4
PTASE4
is required for program and erase operations.
—
—
—
—
—
—
—
4
0
0
0
PTASE3
HVEN
—
—
—
—
—
—
—
3
0
0
0
0
PTAPUD2
PTAPE2
MASS
—
—
—
—
—
—
—
2
0
0
0
PTAPUD1
PTAPE1
PTASE1
Chapter 4 Memory
—
—
—
—
—
—
—
1
0
0
0
PTAPUD0
PTAPE0
PTASE0
FTRIM
SECD
SECD
PGM
Bit 0
—
—
—
—
—
—
—
29