SAH-C515 SIEMENS [Siemens Semiconductor Group], SAH-C515 Datasheet - Page 42

no-image

SAH-C515

Manufacturer Part Number
SAH-C515
Description
8-Bit CMOS Microcontroller
Manufacturer
SIEMENS [Siemens Semiconductor Group]
Datasheet
5.4
For peripheral devices requiring a system clock, the C515 provides a clock output signal derived
from the oscillator frequency as an alternate output function on pin P1.6/CLKOUT. lf bit CLK is set
(bit 6 of special function register ADCON), a clock signal with 1/12 of the oscillator frequency is
gated to pin P1.6/CLKOUT. To use this function the port pin must be programmed to a one (1),
which is also the default after reset.
Special Function Register ADCON (Address D8 H )
Bit
CLK
The system clock is high during S3P1 and S3P2 of every machine cycle and low during all other
states. Thus, the duty cycle of the clock signal is 1:6. Associated with a MOVX instruction the
system clock coincides with the last state (S3) in which a RD or WR signal is active. A timing
diagram of the system clock output is shown in figure 5-6.
Note : During slow-down operation the frequency of the CLKOUT signal is divided by 8.
Semiconductor Group
Bit No.
System Clock Output
D8 H
The shaded bits are not used for clock output control.
MSB
DF H
BD
Function
Clockout enable bit
When set, pin P1.6/CLKOUT outputs the system clock which is 1/12 of the
oscillator frequency.
Reserved bit for future use. Read by CPU returns undefined value.
CLK
DE H
DD H
BSY
DC H
5-6
ADM
DB H
MX2
DA H
MX1
D9 H
Reset / System Clock
Reset Value : 00X000000 B
LSB
MX0
D8 H
ADCON
C515

Related parts for SAH-C515