HT83003 HOLTEK [Holtek Semiconductor Inc], HT83003 Datasheet - Page 13
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HT83003
Manufacturer Part Number
HT83003
Description
Q-Voice
Manufacturer
HOLTEK [Holtek Semiconductor Inc]
Datasheet
1.HT83003.pdf
(21 pages)
one stack is left and the interrupt enable is not well controlled, once a CALL subroutine if used in the interrupt subrou-
tine will corrupt the original control sequence.
Oscillator Configuration
The HT83XXX provides RC oscillator circuit for the sys-
tem clock. The signal is used for the system clock. The
HALT mode stops the system oscillator to conserve
power. If the RC oscillator is used, an external resistor
between OSC1 and VSS is required, and the range of
the resistance should be from 62kW to 100kW. The sys-
tem clock, divided by 4. The RC oscillator provides the
most cost effective solution. However, the frequency of
the oscillation may vary with VDD, temperature, and the
chip itself due to process variations. It is therefore not
suitable for timing sensitive operations where accurate
oscillator frequency is desired.
Rev. 0.10
Time Base Interrupt
Timer Counter 0 Overflow
Timer Counter 1 Overflow
Register
(0BH)
INTC
Interrupt Source
Bit No.
0
1
2
3
4
5
6
7
System Oscillator
Label
ETBI
ET0I
ET1I
TBF
EMI
T0F
T1F
¾
Controls the master (global) interrupt (1= enabled; 0= disabled)
Controls the time base interrupt (1= enabled; 0= disabled)
Controls the timer 0 interrupt (1= enabled; 0= disabled)
Controls the timer 1 interrupt (1= enabled; 0= disabled)
Time base interrupt request flag (1= active; 0= inactive)
Timer 0 request flag (1= active; 0= inactive)
Timer 1 request flag (1= active; 0= inactive)
Unused bit, read as ²0²
Preliminary
Priority
INTC0 register
1
2
3
13
Watchdog Timer - WDT
The WDT clock source is implemented by a dedicated
RC oscillator (WDT oscillator) or instruction clock (sys-
tem clock divided by 4), decided by mask options. This
timer is designed to prevent a software malfunction or
sequence jumping to an unknown location with unpre-
dictable results. The Watchdog Timer can be disabled
by mask option. If the Watchdog Timer is disabled, all
the executions related to the WDT result in no operation.
Once the internal WDT oscillator (RC oscillator with pe-
riod 78ms normally) is selected, it is first divided by 256
(8-stages) to get the nominal time-out period of approxi-
mately 20ms. This time-out period may vary with tem-
perature, VDD and process variations. By invoking the
WDT prescaler, longer time-out period can be realized.
Writing data to WS2, WS1, WS0 (bit 2,1,0 of
WDTS(09H)) can give different time-out period.
If WS2, WS1, WS0 all equal to 1, the division ratio is up
to 1:128, and the maximum time-out period is 2.6 sec-
onds.
If the device operates in a noisy environment, using the
on-chip RC oscillator (WDT OSC) is strongly recom-
mended, since the HALT will stop the system clock.
Function
Vector
0CH
04H
08H
August 25, 2003
HT83XXX