HT83F10 HOLTEK [Holtek Semiconductor Inc], HT83F10 Datasheet - Page 18

• Manufacturer Part Number: HT83F10
• Description: Flash Type Voice OTP MCU
• Manufacturer: HOLTEK [Holtek Semiconductor Inc]

Input/Output Ports
Holtek microcontrollers offer considerable flexibility on
their I/O ports. With the input or output designation of ev-
ery pin fully under user program control, pull-high op-
tions for all ports and wake-up options on certain pins,
the user is provided with an I/O structure to meet the
needs of a wide range of application possibilities.
Depending upon which device or package is chosen,
the microcontroller range provides from 12 bidirectional
input/output lines labeled with port names PA, PB, etc.
These I/O ports are mapped to the Data Memory with
specific addresses as shown in the Special Purpose
Data Memory table. All of these I/O ports can be used
for input and output operations. For input operation,
these ports are non-latching, which means the inputs
must be ready at the T2 rising edge of instruction MOV
A,[m] , where m denotes the port address. For output
operation, all the data is latched and remains un-
changed until the output latch is rewritten.
Pull-high Resistors
Many product applications require pull-high resistors for
their switch inputs usually requiring the use of an exter-
nal resistor. To eliminate the need for these external re-
sistors, all I/O pins, when configured as an input have
the capability of being connected to an internal pull-high
resistor. These pull-high resistors are selectable via
configuration options and are implemented using a
weak PMOS transistor. Note that if the pull-high option is
selected, then all I/O pins on that port will be connected
to pull-high resistors, individual pins can be selected for
pull-high resistor options.
Port A Wake-up
Each device has a HALT instruction enabling the
microcontroller to enter a Power Down Mode and pre-
serve power, a feature that is important for battery and
other low-power applications. Various methods exist to
wake-up the microcontroller, one of which is to change
the logic condition on one of the Port A pins from high to
low. After a HALT instruction forces the microcontroller
into entering a HALT condition, the processor will re-
main idle or in a low-power state until the logic condition
of the selected wake-up pin on Port A changes from high
to low. This function is especially suitable for applica-
tions that can be woken up via external switches. Note
that each pin on Port A can be selected individually to
have this wake-up feature.
Rev. 1.00
18
I/O Port Control Registers
Each I/O port has its own control register PAC and PBC,
to control the input/output configuration. With this con-
trol register, each CMOS output or input with or without
pull-high resistor structures can be reconfigured dynam-
ically under software control. Each pin of the I/O ports is
directly mapped to a bit in its associated port control reg-
ister. For the I/O pin to function as an input, the corre-
sponding bit of the control register must be written as a
be directly read by instructions. When the correspond-
ing bit of the control register is written as a 0 , the I/O
pin will be setup as a CMOS output. If the pin is currently
setup as an output, instructions can still be used to read
the output register. However, it should be noted that the
program will in fact only read the status of the output
data latch and not the actual logic status of the output
pin.
Pin-shared Functions
The flexibility of the microcontroller range is greatly en-
hanced by the use of pins that have more than one func-
tion. Limited numbers of pins can force serious design
constraints on designers but by supplying pins with
multi-functions, many of these difficulties can be over-
come. For some pins, the chosen function of the
multi-function I/O pins is set by configuration options
while for others the function is set by application pro-
gram control.
1 . This will then allow the logic state of the input pin to
Serial Interface Module
The device pins, PB0~PB3, are pin-shared with pins
SDA, SCL, SCS, SCK, SDI, SDO. The choice of which
function is used is selected using the SIMC0 register.
I/O Pin Structures
The following diagrams illustrate the I/O pin internal
structures. As the exact logical construction of the I/O
pin may differ from these drawings, they are supplied
as a guide only to assist with the functional under-
standing of the I/O pins.
Note also that the specified pins refer to the largest
device package, therefore not all pins specified will
exist on all devices.
HT83FXX
May 12, 2009