HT83F10 HOLTEK [Holtek Semiconductor Inc], HT83F10 Datasheet - Page 31

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HT83F10

Manufacturer Part Number
HT83F10
Description
Flash Type Voice OTP MCU
Manufacturer
HOLTEK [Holtek Semiconductor Inc]
Datasheet
Rev. 1.00
SRW Bit
The SRW bit in the SIMC1 register defines whether
the microcontroller slave device wishes to read data
from the I
microcontroller should examine this bit to determine if
it is to be a transmitter or a receiver. If the SRW bit is
set to 1 then this indicates that the master wishes to
r e a d d a t a from the I
microcontroller slave device must be setup to send
data to the I
data to the I
device must be setup to read data from the I
a receiver.
Acknowledge Bit
After the master has transmitted a calling address,
any slave device on the I
address matches the calling address, must generate
an acknowledge signal. This acknowledge signal will
inform the master that a slave device has accepted its
calling address. If no acknowledge signal is received
by the master then a STOP signal must be transmitted
by the master to end the communication. When the
HAAS bit is high, the addresses have matched and
the microcontroller slave device must check the SRW
bit to determine if it is to be a transmitter or a receiver.
If the SRW bit is high, the microcontroller slave device
should be setup to be a transmitter so the HTX bit in
the SIMC1 register should be set to 1 if the SRW bit
is low then the microcontroller slave device should be
setup as a receiver and the HTX bit in the SIMC1 reg-
ister should be set to 0 .
Data Byte
The transmitted data is 8-bits wide and is transmitted
after the slave device has acknowledged receipt of its
slave address. The order of serial bit transmission is
0 then this indicates that the master wishes to send
2
C bus or write data to the I
2
2
C bus, therefore the microcontroller slave
C bus as a transmitter. If the SRW bit is
2
2
C bus, whose own internal
C bu s, the refo r e the
I
2
C Communication Timing Diagram
2
C bus. The
2
C bus as
31
the MSB first and the LSB last. After receipt of 8-bits of
data, the receiver must transmit an acknowledge sig-
nal, level 0 , before it can receive the next data byte.
If the transmitter does not receive an acknowledge bit
signal from the receiver, then it will release the SDA
line and the master will send out a STOP signal to re-
lease control of the I
will be stored in the SIMDR register. If setup as a
transmitter, the microcontroller slave device must first
write the data to be transmitted into the SIMDR regis-
ter. If setup as a receiver, the microcontroller slave de-
vice must read the transmitted data from the SIMDR
register.
Receive Acknowledge Bit
When the receiver wishes to continue to receive the
next data byte, it must generate an acknowledge bit,
known as TXAK, on the 9th clock. The microcontroller
slave device, which is setup as a transmitter will check
the RXAK bit in the SIMC1 register to determine if it is
to send another data byte, if not then it will release the
SDA line and await the receipt of a STOP signal from
the master.
Data Timing Diagram
2
C bus. The corresponding data
HT83FXX
May 12, 2009

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