X40430 INTERSIL [Intersil Corporation], X40430 Datasheet - Page 18

• Manufacturer Part Number: X40430
• Description: Triple Voltage Monitor with Integrated CPU Supervisor
• Manufacturer: INTERSIL [Intersil Corporation]

TIMING DIAGRAMS
Bus Timing
WP Pin Timing
Write Cycle Timing
Nonvolatile Write Cycle Timing
Note:
SDA OUT
Symbol
SDA IN
t
(1) t
WC
SDA
SCL
SCL
the minimum cycle time to be allowed for any nonvolatile write by the user, unless Acknowledge Polling is used.
(1)
WC
is the time from a valid stop condition at the end of a write sequence to the end of the self-timed internal nonvolatile write cycle. It is
t
SU:STA
SDA IN
SCL
WP
8
th
Bit of Last Byte
t
HD:STA
18
START
t
F
t
SU:WP
Write Cycle Time
Parameter
t
SU:DAT
X40430, X40431, X40434, X40435
t
Clk 1
HIGH
ACK
t
Slave Address Byte
LOW
t
HD:DAT
Condition
Stop
Min
t
R
t
AA
t
Clk 9
HD:WP
t
WC
t
DH
Typ
5
Condition
Start
t
BUF
Max
10
t
SU:STO
Unit
July 29, 2005
ms
FN8251.0