LF3320QC15 LODEV [LOGIC Devices Incorporated], LF3320QC15 Datasheet - Page 13

• Manufacturer Part Number: LF3320QC15
• Description: Horizontal Digital Image Filter
• Manufacturer: LODEV [LOGIC Devices Incorporated]

DEVICES INCORPORATED
Output Adder
The Output Adder adds the Filter A and
B outputs together when the device is in
Single Filter Mode. If 24-bit data and 12-
bit coefficients or 12-bit data and 24-bit
coefficients are desired, the LF3320 can
facilitate this by scaling the Filter B
output by 2
Filter A output. Bit 3 in Configuration
Register 5 determines if the Filter B
output is scaled before being added to
the Filter A output.
Rounding
The overall filter output (Single Filter
Mode) or Filter A and B outputs (Dual
Filter Mode) may be rounded by adding
F
IGURE
FILTER B RSL
16. F
-12
RSLB
4
before adding it to the
3-0
ILTER
32
32
5
A
DATA OUT
AND
DATA IN
SELECT
32
32
16
16
LIMIT
RND
B R
OUND
the contents of one of the sixteen Filter
A or B round registers to the overall
filter, Filter A, or Filter B outputs (see
Figure 10). The Filter A round registers
are used for the overall filter (Single
Filter Mode) or Filter A (Dual Filter
Mode). The Filter B round registers are
used for Filter B (Dual Filter Mode).
Each round register is 32-bits wide and
user-programmable. This allows the
filter’s output to be rounded to any
precision required. Since any 32-bit
value may be programmed into the
round registers, the device can support
complex rounding algorithms as well as
standard Half-LSB rounding. RSLA
determines which of the sixteen
Filter A round registers are used in the
/S
ELECT
DATA OUT
DATA IN
SELECT
32
32
16
16
LIMIT
RND
/L
IMIT
32
32
C
5
IRCUITRY
2-13
RSLA
4
FILTER A RSL
3-0
Horizontal Digital Image Filter
3-0
Filter A rounding circuitry. RSLB
determines which of the sixteen Filter B
round registers are used in the Filter B
rounding circuitry. A value of 0 on
RSLA/RSLB
round register 0. A value of 1 selects
Filter A/B round register 1 and so
on. RSLA/RSLB
every clock cycle if desired. This
allows the rounding algorithm to be
changed every clock cycle. This is
useful when filtering interleaved
data. If rounding is not desired, a
round register should be loaded with 0
and selected as the register used for
rounding. Round register loading is
discussed in the LF Interface
Output Select
The word width of the overall filter,
Filter A, and Filter B outputs is 32-bits.
However, only 16-bits may be sent to
DOUT
and COUT
Mode). The Filter A/B select circuitry
determines which 16-bits are passed
(see Table 1). The Filter A/B select
registers control the Filter A/B select
circuitry. There are sixteen Filter A
and B select registers.
The Filter A select registers are used for
the overall filter (Single Filter Mode) or
Filter A (Dual Filter Mode). The Filter B
select registers are used for Filter B (Dual
Filter Mode). Each select register is 5 bits
wide and user-programmable. RSLA
determines which of the sixteen Filter A
select registers are used in the Filter A
select circuitry. RSLB
which of the sixteen Filter B select
registers are used in the Filter B select
circuitry. A value of 0 on
RSLA/RSLB
register 0. A value of 1 selects Filter A/B
select register 1 and so on.
RSLA/RSLB
clock cycle if desired. This allows the
16-bit window to be changed every
clock cycle. This is useful when filtering
interleaved data. Select register load-
ing is discussed in the LF Interface
section.
Video Imaging Products
15-0
(Single or Dual Filter Modes)
11-0
3-0
3-0
3-0
/ROUT
selects Filter A/B select
may be changed every
selects Filter A/B
3-0
3-0
may be changed
3-0
determines
08/16/2000–LDS.3320-N
(Dual Filter
TM
LF3320
section.
3-0
TM
3-0