LF3321 LODEV [LOGIC Devices Incorporated], LF3321 Datasheet - Page 23

• Manufacturer Part Number: LF3321
• Description: Horizontal Digital Image Filter Improved Performance
• Manufacturer: LODEV [LOGIC Devices Incorporated]

DEVICES INCORPORATED
Controls Cont’d
LOGIC Devices Incorporated
Signal Definitions
CENB — Coefficient Address Enable B
When CENB is LOW, data on CAB7-0 is latched into Coefficient Address Register B on the rising edge
of CLK. When CENB is HIGH, data on CAB7-0 is not latched and the register’s contents will not be
changed.
TXFRA — Filter A LIFO Transfer Control
TXFRA is used to change which LIFO in the data reversal circuitry sends data to the reverse data path
and which LIFO receives data from the forward data path in Filter A. When TXFRA goes LOW, the LIFO
sending data to the reverse data path becomes the LIFO receiving data from the forward data path, and
the LIFO receiving data from the forward data path becomes the LIFO sending data to the reverse data
path. The device must see a HIGH to LOW transition of TXFRA in order to switch LIFOs. TXFRA is
latched on the rising edge of CLK.
TXFRB — Filter B LIFO Transfer Control
TXFRB is used to change which LIFO in the data reversal circuitry sends data to the reverse data path
and which LIFO receives data from the forward data path in Filter B. When TXFRB goes LOW, the LIFO
sending data to the reverse data path becomes the LIFO receiving data from the forward data path, and
the LIFO receiving data from the forward data path becomes the LIFO sending data to the reverse data
path. The device must see a HIGH to LOW transition of TXFRB in order to switch LIFOs. TXFRB is
latched on the rising edge of CLK.
ACCA — Accumulator A Control
When ACCA is HIGH, Accumulator A is enabled for accumulation and the Accumulator A Output Register
is disabled for loading. When ACCA is LOW, no accumulation is performed and the Accumulator A Output
Register is enabled for loading. ACCA is latched on the rising edge of CLK.
ACCB — Accumulator B Control
When ACCB is HIGH, Accumulator B is enabled for accumulation and the Accumulator B Output Register
is disabled for loading. When ACCB is LOW, no accumulation is performed and the Accumulator B Output
Register is enabled for loading. ACCB is latched on the rising edge of CLK.
SHENA — Filter A Shift Enable
In Dual Filter Mode, SHENA enables or disables the loading of data into the Input (DIN11-0) and Filter A
I/D Registers. When SHENA is LOW, data is latched into the Input/Cascade Registers and shifted through
the I/D Registers on the rising edge of CLK. When SHENA is HIGH, data can not be loaded into the
Input/Cascade Registers or shifted through the I/D Registers and their contents will not be changed.
In Single Filter Mode, SHENA also enables or disables the loading of data into the Reverse Cascade
Input (RIN11-0), Cascade Output (COUT11-0), Reverse Cascade Output (ROUT11-0) and Filter B I/D
Registers. It is important to note that in Single Filter Mode, both SHENA and SHENB should be connected
together. Both must be active to enable data loading in Single Filter Mode. SHENA is latched on the
rising edge of CLK.
23
Horizontal Digital Image Filter
Improved Performance
Video Imaging Products
Feb 5, 2003 LDS.3321-A
LF3321