XR68C192 EXAR [Exar Corporation], XR68C192 Datasheet - Page 19

• Manufacturer Part Number: XR68C192
• Description: DUAL UNIVERSAL ASYNCHRONOUS RECEIVER AND TRANSMITTER
• Manufacturer: EXAR [Exar Corporation]

1 01 0 = Set Timeout Mode On. The receiver in this
1 0 1 1 = Set MR pointer to MR0.
1 1 0 0 = Disable Timeout Mode. This command re-
1 1 0 1 = Not used.
1 1 1 0 = Power Down Mode On. In this mode, the
Rev. P1.10
channel will restart the C/T as each receive
character is transferred from the shift register
to the receive FIFO. The C/T is placed in the
counter mode, the START/STOP counter
commands are disabled, the counter is
stopped, and the Counter Ready Bit, ISR Bit-
3 is reset. (See also Watchdog timer de-
scription in the receiver section.)
turns control of the C/T to the regular Start/
Stop counter commands. It does not stop the
counter, or clear any pending interrupts.
After disabling the timeout mode, a “Stop
Counter” command should be issued to force
a reset of the ISR Bit-3.
DUART oscillator is stopped and all func-
tions requiring this clock are suspended. The
execution of commands other than disable
power down mode (1111) requires a XTAL1.
Baud Rate Table (based on a 3.6864MHz clock)
CSR
A/B
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
IP4-16X
Bit-7=0
SET-1
IP4-1X
134.5
38.4k
Timer
1200
1050
2400
4800
7200
9600
ACR
110
200
300
600
50
MR0 Bits
2,0=0
IP4-16X
Bit-7=1
SET-2
IP4-1X
134.5
19.2k
Timer
1200
2000
2400
4800
1800
9600
ACR
110
150
300
600
75
Bit-7=0
IP4-16X
230.4k
IP4-1X
SET-1
134.5
14.4k
28.8k
57.6k
Timer
ACR
1200
1800
3600
7200
1050
7200
300
110
(extended 1)
MR0 Bit-0=1
19
1 1 1 1 = Disable Power Down Mode. This command
STATUS REGISTER (SRA/SRB)
SR A/B Bit-0.
Receive Ready.
This bit indicates that one or more character(s) has
been received and is waiting in the FIFO for the CPU to
read it. It is set when the first character is transferred
Bit-7=1
IP4-16X
115.2k
IP4-1X
SET-2
134.5
14.4k
28.8k
57.6k
Timer
ACR
1800
3600
7200
2000
1800
450
110
900
While in the power down mode, do not issue
any commands to the CR A/B except the
disable power down mode command. The
contents of all registers will be saved while in
this mode. It is recommended that the trans-
mitter and receiver be disabled prior to plac-
ing the DUART into power down mode. This
command is in CRA only.
restarts the oscillator. After invoking this
command, wait for the oscillator to start up
before writing further commands to the CR A/
B. This command is in CRA only. For maxi-
mum power reduction input pins should be at
GND or VCC.
IP4-16X
Bit-7=0
115.2k
IP4-1X
SET-1
19.2k
28.8k
57.6k
57.6k
57.6k
38.4k
Timer
ACR
4800
1076
1050
4800
9600
680
XR68C92/192
(extended 2)
MR0 Bit-2=1
IP4-16X
Bit-7=1
115.2k
IP4-1X
SET-2
14.4k
28.8k
57.6k
57.6k
14.4k
19.2k
Timer
7200
1076
2000
4800
9600
ACR
680