A3PE1500-1FG896 ACTEL [Actel Corporation], A3PE1500-1FG896 Datasheet - Page 79

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A3PE1500-1FG896

Manufacturer Part Number
A3PE1500-1FG896
Description
ProASIC3E Flash Family FPGAs
Manufacturer
ACTEL [Actel Corporation]
Datasheet
Table 2-93 • A3PE3000 Global Resource
Parameter
t
t
t
t
t
F
Notes:
1. Value reflects minimum load. The delay is measured from the CCC output to the clock pin of a sequential
2. Value reflects maximum load. The delay is measured on the clock pin of the farthest sequential element,
3. For specific junction temperature and voltage supply levels, refer to
RCKL
RCKH
RCKMPWH
RCKMPWL
RCKSW
RMAX
element, located in a lightly loaded row (single element is connected to the global net).
located in a fully loaded row (all available flip-flops are connected to the global net in the row).
Input LOW Delay for Global Clock
Input HIGH Delay for Global Clock
Minimum Pulse Width HIGH for Global Clock
Minimum Pulse Width LOW for Global Clock
Maximum Skew for Global Clock
Maximum Frequency for Global Clock
Commercial-Case Conditions: T
Description
J
= 70°C, V
v1.2
CC
Min.
1.41 1.62 1.60 1.85 1.88 2.17 2.26 2.61
1.40 1.66 1.59 1.89 1.87 2.22 2.25 2.66
= 1.425 V
1
–2
Max.
0.26
2
Min.
Table 2-6 on page 2-5
ProASIC3E DC and Switching Characteristics
1
–1
Max.
0.29
2
Min.
Std.
1
Max.
0.35
2
for derating values.
Min.
1
–F
Max.
0.41
2
Units
MHz
ns
ns
ns
ns
ns
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