AGLE3000V2-FFG896 ACTEL [Actel Corporation], AGLE3000V2-FFG896 Datasheet - Page 9
![no-image](/images/no-image-200.jpg)
AGLE3000V2-FFG896
Manufacturer Part Number
AGLE3000V2-FFG896
Description
IGLOOe Low-Power Flash FPGAs with Flash Freeze Technology
Manufacturer
ACTEL [Actel Corporation]
Datasheet
1.AGLE3000V2-FFG896.pdf
(156 pages)
- Current page: 9 of 156
- Download datasheet (6Mb)
Figure 1-2 • IGLOOe Flash*Freeze Mode
Figure 1-3 • VersaTile Configurations
X1
X2
X3
LUT-3 Equivalent
LUT-3
inherent low power static and dynamic capabilities of the IGLOOe device. Refer to
illustration of entering/exiting Flash*Freeze mode.
VersaTiles
The IGLOOe core consists of VersaTiles, which have been enhanced beyond the ProASIC
tiles. The IGLOOe VersaTile supports the following:
Refer to
User Nonvolatile FlashROM
Actel IGLOOe devices have 1 kbit of on-chip, user-accessible, nonvolatile FlashROM. The FlashROM
can be used in diverse system applications:
The FlashROM is written using the standard IGLOOe IEEE 1532 JTAG programming interface. The
core can be individually programmed (erased and written), and on-chip AES decryption can be used
selectively to securely load data over public networks, as in security keys stored in the FlashROM for
a user design.
•
•
•
•
•
•
•
•
•
•
•
•
Y
All 3-input logic functions—LUT-3 equivalent
Latch with clear or set
D-flip-flop with clear or set
Enable D-flip-flop with clear or set
Internet protocol addressing (wireless or fixed)
System calibration settings
Device serialization and/or inventory control
Subscription-based business models (for example, set-top boxes)
Secure key storage for secure communications algorithms
Asset management/tracking
Date stamping
Version management
Figure 1-3
Mode Control
Flash*Freeze
for VersaTile configurations.
D-Flip-Flop with Clear or Set
Data
CLK
CLR
D-FF
v1.2
Y
Flash*Freeze Pin
Actel IGLOOe
FPGA
Enable D-Flip-Flop with Clear or Set
Enable
Data
CLK
CLR
IGLOOe Low-Power Flash FPGAs
D-FF
Figure 1-2
Y
PLUS®
for an
core
1 - 5
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