LC4032B-10T44I LATTICE [Lattice Semiconductor], LC4032B-10T44I Datasheet - Page 34

• Manufacturer Part Number: LC4032B-10T44I
• Description: 3.3V/2.5V/1.8V In-System Programmable SuperFAST High Density PLDs
• Manufacturer: LATTICE [Lattice Semiconductor]

Lattice Semiconductor
ispMACH 4032Z Timing Adders
Optional Delay Adders
t
t
t
t
t
LVTTL_in
LVCMOS33_in
LVCMOS25_in
LVCMOS18_in
PCI_in
t
LVTTL_out
LVCMOS33_out t
LVCMOS25_out t
LVCMOS18_out t
PCI_out
Slow Slew
1. Preliminary information.
2. Refer to Technical Note TN 1004: ispMACH 4000 Timing Model Design and Usage Guidelines for information regarding use of these
Note: Open drain timing is the same as corresponding LVCMOS timing.
INDIO
EXP
ORP
BLA
IOI
IOO
adders.
Input Adjusters
Output Adjusters
Adder
Type
t
t
—
t
t
t
t
t
t
t
t
t
INREG
MCELL
ROUTE
IN,
IN,
IN,
IN,
IN,
BUF,
BUF,
BUF,
BUF,
BUF,
BUF,
t
t
t
t
t
Parameter
GCLK_IN,
GCLK_IN,
GCLK_IN,
GCLK_IN,
GCLK_IN,
t
t
t
t
t
t
EN,
EN,
EN,
EN,
EN,
EN
Base
t
t
t
t
t
DIS
DIS
DIS
DIS
DIS
t
t
t
t
t
GOE
GOE
GOE
GOE
GOE
Input register delay
Product term expander delay
Output routing pool delay
Additional block loading adder
Using LVTTL standard
Using LVCMOS 3.3 standard
Using LVCMOS 2.5 standard
Using LVCMOS 1.8 standard
Using PCI compatible input
Output configured as TTL
buffer
Output configured as 3.3V
buffer
Output configured as 2.5V
buffer
Output configured as 1.8V
buffer
Output configured as PCI
compatible buffer
Output configured for slow
slew rate
Description
1, 2
34
ispMACH 4000V/B/C/Z Family Data Sheet
Min.
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
-35
Max.
1.00
0.40
0.40
0.04
0.70
0.70
0.40
0.00
0.70
0.70
0.70
0.40
0.00
0.70
1.00
Min.
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
-5
Max.
1.00
0.50
0.05
0.05
0.70
0.70
0.40
0.00
0.70
0.70
0.70
0.40
0.00
0.70
1.00
Min.
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
-7
Max.
1.00
0.50
0.05
0.05
0.70
0.70
0.40
0.00
0.70
0.70
0.70
0.40
0.00
0.70
1.00
Timing v.1.2
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns