BS62LV1024DC BSI [Brilliance Semiconductor], BS62LV1024DC Datasheet

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BS62LV1024DC

Manufacturer Part Number
BS62LV1024DC
Description
Very Low Power/Voltage CMOS SRAM 128K X 8 bit
Manufacturer
BSI [Brilliance Semiconductor]
Datasheet
R0201-BS62LV1024
• Wide Vcc operation voltage : 2.4V ~ 5.5V
• Very low power consumption :
• High speed access time :
• Automatic power down when chip is deselected
• Three state outputs and TTL compatible
• Fully static operation
• Data retention supply voltage as low as 1.5V
• Easy expansion with CE2, CE1, and OE options
PIN CONFIGURATIONS
Brilliance Semiconductor Inc
FEATURES
PRODUCT FAMILY
Vcc = 3.0V
Vcc = 5.0V
-70
B S 6 2 LV
B S 6 2 LV
B S 6 2 LV
B S 6 2 LV
B S 6 2 LV
B S 6 2 LV
B S 6 2 LV
B S 6 2 LV
B S 6 2 LV
B S 6 2 LV
B S 6 2 LV
B S 6 2 LV
P R O D U C T
F A M ILY
VCC
BSI
CE2
A11
A13
A15
A16
A14
A12
WE
NC
A9
A8
A7
A6
A5
A4
70ns (Max.) at Vcc = 3.0V
1 0 2 4 S C
1 0 2 4 T C
1 0 2 4 S T C
1 0 2 4 P C
1 0 2 4 J C
1 0 2 4 D C
1 0 2 4 S I
1 0 2 4 T I
1 0 2 4 S T I
1 0 2 4 P I
1 0 2 4 J I
1 0 2 4 D I
GND
DQ0
DQ1
DQ2
A16
A14
A12
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
NC
A7
A6
A5
A4
A3
A2
A1
A0
0.02uA (Typ.) CMOS standby current
0.4uA (Typ.) CMOS standby current
C-grade : 20mA (Max.) operating current
C-grade : 35mA (Max.) operating current
I- grade : 25mA (Max.) operating current
I- grade : 40mA (Max.) operating current
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
BS62LV1024SC
BS62LV1024SI
BS62LV1024PC
BS62LV1024PI
BS62LV1024JC
BS62LV1024JI
BS62LV1024TC
BS62LV1024STC
BS62LV1024TI
BS62LV1024STI
T E M P E R AT U R E
-4 0
+ 0
O P E R AT IN G
O
O
C to + 7 0
Very Low Power/Voltage CMOS SRAM
128K X 8 bit
C to + 8 5
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
O
O
VCC
A15
CE2
WE
A13
A8
A9
A11
OE
A10
CE1
DQ7
DQ6
DQ5
DQ4
DQ3
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
C
C 2 .4 V ~ 5 .5 V
. reserves the right to modify document contents without notice.
2 .4 V ~ 5 .5 V
OE
A10
CE
DQ7
DQ6
DQ5
DQ4
DQ3
GND
DQ2
DQ1
DQ0
A0
A1
A2
A3
R A N G E
1
V c c
S P E E D
V c c = 3 V
(n s )
7 0
7 0
The BS62LV1024 is a high performance, very low power CMOS
Static Random Access Memory organized as 131,072 words by 8 bits
and operates from a wide range of 2.4V to 5.5V supply voltage.
Advanced CMOS technology and circuit techniques provide both high
speed and low power features with a typical CMOS standby current of
0.02uA and maximum access time of 70ns in 3V operation.
Easy memory expansion is provided by an active LOW chip
enable (CE1), an active HIGH chip enable (CE2), and active LOW
output enable (OE) and three-state output drivers.
The BS62LV1024 has an automatic power down feature, reducing the
power consumption significantly when chip is deselected.
The BS62LV1024 is available in DICE form, JEDEC standard 32 pin
450mil Plastic SOP, 300mil Plastic SOJ, 600mil Plastic DIP, 8mmx13.4mm
STSOP and 8mmx20mm TSOP.
1
DESCRIPTION
BLOCK DIAGRAM
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
CE2
A12
A14
A16
A15
A13
A11
CE1
Vdd
Gnd
WE
OE
A6
A7
A8
A9
V c c = 5 V
3 .0 u A
5 .0 u A
(
Ic c S B 1 , M a x )
S ta n d b y
Address
Buffer
P O W E R D IS S IPAT IO N
Input
8
Control
8
V c c = 3 V
1 .0 u A
1 .5 u A
20
Output
Buffer
Buffer
Data
Input
Data
V c c = 5 V
Decoder
3 5 m A
4 0 m A
Row
O p e r a tin g
(Ic c , M a x )
8
1024
V c c = 3 V
8
2 0 m A
2 5 m A
BS62LV1024
A5
Address Input Buffer
A4
Column Decoder
Memory Array
Sense Amp
Write Driver
Column I/O
A3 A2 A1 A0 A10
1024 x 1024
S O
T S
S T
P D
S O
D I
S O
T S
S T
P D
S O
D I
P K G T Y P E
C E
C E
O P -3 2
S O P -3 2
O P -3 2
S O P -3 2
IP -3 2
IP -3 2
P -3 2
J -3 2
P -3 2
J -3 2
1024
128
14
Revision 2.2
April 2001

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BS62LV1024DC Summary of contents

Page 1

BSI Very Low Power/Voltage CMOS SRAM 128K X 8 bit FEATURES • Wide Vcc operation voltage : 2.4V ~ 5.5V • Very low power consumption : Vcc = 3.0V C-grade : 20mA (Max.) operating current I- grade : 25mA (Max.) ...

Page 2

BSI PIN DESCRIPTIONS Name A0-A16 Address Input CE1 Chip Enable 1 Input CE2 Chip Enable 2 Input WE Write Enable Input OE Output Enable Input DQ0-DQ7 Data Input/Output Ports Vcc Gnd TRUTH TABLE MODE WE X Not selected (Power Down) ...

Page 3

BSI DC ELECTRICAL CHARACTERISTICS PARAMETER PARAMETER NAME Guaranteed Input Low V IL (2) Voltage Guaranteed Input High V IH (2) Voltage I Input Leakage Current IL I Output Leakage Current OL V Output Low Voltage OL V Output High Voltage ...

Page 4

BSI AC TEST CONDITIONS Input Pulse Levels Input Rise and Fall Times Input and Output Timing Reference Level AC TEST LOADS AND WAVEFORMS Ω 1269 3.3V OUTPUT OUTPUT 100PF INCLUDING Ω 1404 JIG AND SCOPE FIGURE 1A THEVENIN EQUIVALENT Ω ...

Page 5

BSI SWITCHING WAVEFORMS (READ CYCLE) (1,2,4) READ CYCLE1 ADDRESS D OUT (1,3,4) READ CYCLE2 CE1 CE2 D OUT (1,4) READ CYCLE3 ADDRESS OE CE1 CE2 D OUT NOTES high in read Cycle. 2. Device is continuously selected ...

Page 6

BSI AC ELECTRICAL CHARACTERISTICS WRITE CYCLE JEDEC PARAMETER PARAMETER NAME NAME t t AVAX E1LWH AVWL AVWH WLWH WHAX WR1 t t E2LAX WR2 t ...

Page 7

BSI (1,6) WRITE CYCLE2 ADDRESS CE1 CE2 WE D OUT D IN NOTES must be high during address transitions. 2. The internal write time of the memory is defined by the overlap of CE1 and CE2 active and ...

Page 8

BSI ORDERING INFORMATION BS62LV1024 PACKAGE DIMENSIONS SOP -32 R0201-BS62LV1024 WITH PLATING BASE METAL SECTION A-A 8 BS62LV1024 SPEED 70: 70ns GRADE + -40 C ...

Page 9

BSI PACKAGE DIMENSIONS (continued) STSOP - 32 TSOP - 32 R0201-BS62LV1024 9 BS62LV1024 Revision 2.2 April 2001 ...

Page 10

BSI PACKAGE DIMENSIONS (continued) PDIP - 32 SOJ - 32 R0201-BS62LV1024 10 BS62LV1024 Revision 2.2 April 2001 ...

Page 11

BSI REVISION HISTORY Revision Description 2.2 2001 Data Sheet release R0201-BS62LV1024 Date Apr. 15, 2001 11 BS62LV1024 Note Revision 2.2 April 2001 ...

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