CS8900-CQ3 Cirrus Logic, CS8900-CQ3 Datasheet - Page 64
CS8900-CQ3
Manufacturer Part Number
CS8900-CQ3
Description
Crystal LAN ISA Ethernet Controller
Manufacturer
Cirrus Logic
Datasheet
1.CS8900-CQ3.pdf
(128 pages)
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4.4.17 Register 14: Line Status
(LineST, Read-only, Address: PacketPage base + 0134h)
LineST reports the status of the Ethernet physical interface.
010100
LinkOK
AUI
10BT
PolarityOK
CRS
Reset value is:
64
LinkOK
7
F
0000 0000 0001 0100
CRS
Register. When reading this register, these bits will be 010100, where the LSB corresponds to
Bit 0.
CS8900A has just come out of reset, or because the receiver has not detected any activity (link
pulses or received packets) for at least 50 ms.
the polarity is reversed. If PolarityDis (Register 13, LineCTL, Bit C) is clear, the polarity is auto-
matically corrected, if needed. The PolarityOK status bit shows the true state of the incoming
polarity independent of the PolarityDis control bit. Thus, if PolarityDis is clear and PolarityOK is
clear, then the receive polarity is inverted, and corrected.
received. CRS remains asserted until the end of frame (EOF). At EOF, CRS goes inactive in
about 1.3 to 2.3 bit times after the last low-to-high transition of the recovered data.
These bits provide an internal address used by the CS8900A to identify this as the Line Status
If set, the 10BASE-T link has not failed. When clear, the link has failed, either because the
If set, the CS8900A is using the AUI.
If set, the CS8900A is using the 10BASE-T interface.
If set, the polarity of the 10BASE-T receive signal (at the RXD+ / RXD- inputs) is correct. If clear,
This bit tells the host the status of an incoming frame. If CRS is set, a frame is currently being
6
E
D
5
CIRRUS LOGIC PRODUCT DATA SHEET
PolarityOK
C
4
B
3
Crystal LAN™ ISA Ethernet Controller
010100
A
2
10BT
1
9
CS8900A
DS271PP3
AUI
0
8
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