ADUC845BCP8-5 Analog Devices, ADUC845BCP8-5 Datasheet - Page 96
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ADUC845BCP8-5
Manufacturer Part Number
ADUC845BCP8-5
Description
MicroConverter Multichannel 24-/16-Bit ADCs with Embedded 62 kB Flash and Single-Cycle MCU
Manufacturer
Analog Devices
Datasheet
1.ADUC845BCP8-5.pdf
(108 pages)
- Current page: 96 of 108
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ADuC845/ADuC847/ADuC848
Table 65. EXTERNAL DATA MEMORY READ CYCLE Parameter
t
t
t
t
t
t
t
t
t
t
t
t
RLRH
AVLL
LLAX
RLDV
RHDX
RHDZ
LLDV
AVDV
LLWL
AVWL
RLAZ
WHLH
RD Pulse Width
Address Valid after ALE Low
Address Hold after ALE Low
RD Low to Valid Data In
Data and Address Hold after RD
Data Float after RD
ALE Low to Valid Data In
Address to Valid Data In
ALE Low to RD or WR Low
Address Valid to RD or WR Low
RD Low to Address Float
RD or WR High to ALE High
PORT 0 (I/O)
PORT 2 (O)
PSEN (O)
ALE (O)
RD (O)
t
AVLL
A0 A7 (OUT)
A16 A23
t
AVDV
t
Figure 72. External Data Memory Read Cycle
LLAX
t
AVWL
t
LLWL
t
LLDV
Rev. A | Page 96 of 108
Min
60
60
145
0
130
190
60
t
12.58 MHz Core Clock
RLAZ
t
RLDV
A8 A15
Max
48
150
170
230
15
t
DATA (IN)
RLRH
t
RHDX
t
Min
125
120
290
0
255
375
120
WHLH
t
RHDZ
6.29 MHz Core Clock
Max
100
625
350
470
35
ns
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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