M24512 STMicroelectronics, M24512 Datasheet - Page 4

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M24512

Manufacturer Part Number
M24512
Description
512 Kbit Serial IC Bus EEPROM
Manufacturer
STMicroelectronics
Datasheet

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M24512
Figure 4. I
command, after (and only after) a NoAck, forces
the memory device into its standby state. A STOP
condition at the end of a Write command triggers
the internal EEPROM write cycle.
Acknowledge Bit (ACK)
An acknowledge signal is used to indicate a suc-
cessful byte transfer. The bus transmitter, whether
it be master or slave, releases the SDA bus after
sending eight bits of data. During the 9
pulse period, the receiver pulls the SDA bus low to
acknowledge the receipt of the eight data bits.
Data Input
During data input, the memory device samples the
SDA bus signal on the rising edge of the clock,
SCL. For correct device operation, the SDA signal
must be stable during the clock low-to-high transi-
tion, and the data must change only when the SCL
line is low.
4/16
SCL
SDA
SCL
SDA
SCL
SDA
2
C Bus Protocol
CONDITION
START
CONDITION
START
MSB
1
MSB
1
2
2
th
INPUT
SDA
3
clock
3
CHANGE
SDA
Memory Addressing
To start communication between the bus master
and the slave memory, the master must initiate a
START condition. Following this, the master sends
the 8-bit byte, shown in Table 3, on the SDA bus
line (most significant bit first). This consists of the
7-bit Device Select Code, and the 1-bit Read/Write
Designator (RW). The Device Select Code is fur-
ther subdivided into: a 4-bit Device Type Identifier,
and a 3-bit Chip Enable “Address” (E2, E1, E0).
To address the memory array, the 4-bit Device
Type Identifier is 1010b.
Up to eight memory devices can be connected on
a single I
code on its Chip Enable inputs. When the Device
Select Code is received on the SDA bus, the mem-
ory only responds if the Chip Select Code is the
same as the pattern applied to its Chip Enable
pins.
7
2
7
C bus. Each one is given a unique 3-bit
8
8
ACK
9
ACK
CONDITION
9
STOP
CONDITION
STOP
AI00792

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