Z8F160x Zilog, Z8F160x Datasheet - Page 171
Z8F160x
Manufacturer Part Number
Z8F160x
Description
Z8 Encore / Microcontrollers with Flash Memory and 10 Bit A/D Converter
Manufacturer
Zilog
Datasheet
1.Z8F160X.pdf
(246 pages)
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PS017610-0404
Debug Mode
Figure 88. Interfacing the On-Chip Debugger’s DBG Pin with an RS-232 Interface (2)
The operating characteristics of the Z8F640x family devices in Debug mode are:
•
•
•
•
•
Entering Debug Mode
The Z8F640x family device enters Debug mode following any of the following opera-
tions:
•
•
•
•
Exiting Debug Mode
The device exits Debug mode following any of the following operations:
•
RS-232 TX
RS-232 RX
The eZ8 CPU fetch unit stops, idling the eZ8 CPU, unless directed by the OCD to
execute specific instructions.
The system clock operates unless in Stop mode.
All enabled on-chip peripherals operate unless in Stop mode.
Automatically exits Halt mode.
Constantly refreshes the Watch-Dog Timer, if enabled.
Writing the DBGMODE bit in the OCD Control Register to 1 using the OCD interface.
eZ8 CPU execution of a BRK (Breakpoint) instruction (when enabled).
Break upon a Watchpoint match.
If the DBG pin is Low when the Z8F640x family device exits Reset, the On-Chip
Debugger automatically puts the device into Debug mode.
Clearing the DBGMODE bit in the OCD Control Register to 0.
Transceiver
RS-232
Z8F640x/Z8F480x/Z8F320x/Z8F240x/Z8F160x
Open-Drain
Buffer
VDD
10K Ohm
DBG Pin
On-Chip Debugger
Z8 Encore!
®
153
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