MC9S12A256B ETC, MC9S12A256B Datasheet - Page 108

• Manufacturer Part Number: MC9S12A256B
• Description: device made up of standard HCS12 blocks and the HCS12 processor core
• Manufacturer: ETC

MC9S12DP256B Device User Guide — V02.14
A.5.1.4 Stop Recovery
Out of STOP the controller can be woken up by an external interrupt. A clock quality check as after POR
is performed before releasing the clocks to the system.
A.5.1.5 Pseudo Stop and Wait Recovery
The recovery from Pseudo STOP and Wait are essentially the same since the oscillator was not stopped in
both modes. The controller can be woken up by internal or external interrupts. After t
fetching the interrupt vector.
A.5.2 Oscillator
The device features an internal Colpitts oscillator. By asserting the XCLKS input during reset this
oscillator can be bypassed allowing the input of a square wave. Before asserting the oscillator to the
internal system clocks the quality of the oscillation is checked for each start from either power-on, STOP
or oscillator fail. t
POR or STOP if a proper oscillation is not detected. The quality check also determines the minimum
oscillator start-up time t
asserted if the frequency of the incoming clock signal is below the Assert Frequency f
Conditions are shown in Table A-4 unless otherwise noted
Num C
NOTES:
1. f
2. Maximum value is for extreme cases using high Q, low frequency crystals
3. XCLKS =0 during reset
10
11
12
108
1
2
3
4
5
6
7
8
9
osc
C Crystal oscillator range
P Startup Current
C Oscillator start-up time
D Clock Quality check time-out
P Clock Monitor Failure Assert Frequency
P External square wave input frequency
D External square wave pulse width low
D External square wave pulse width high
D External square wave rise time
D External square wave fall time
D Input Capacitance (EXTAL, XTAL pins)
C
= 4MHz, C = 22pF.
DC Operating Bias in Colpitts Configuration on
EXTAL Pin
CQOUT
UPOSC
specifies the maximum time before switching to the internal self clock mode after
Rating
Freescale Semiconductor, Inc.
. The device also features a clock monitor. A Clock Monitor Failure is
Table A-15 Oscillator Characteristics
For More Information On This Product,
Go to: www.freescale.com
3
Symbol
V
t
t
UPOSC
CQOUT
f
t
t
t
t
DCBIAS
f
i
CMFA
f
EXTH
EXTR
EXTL
EXTF
OSC
OSC
C
EXT
IN
Min
0.45
100
0.5
0.5
9.5
9.5
50
Typ
100
1.1
8
9
1
wrs
CMFA.
the CPU starts
Max
100
200
2.5
16
50
1
1
2
Unit
MHz
MHz
KHz
ms
pF
ns
ns
ns
ns
V
s
A