MT8LSDT3264A Micron Technology, MT8LSDT3264A Datasheet - Page 10

• Manufacturer Part Number: MT8LSDT3264A
• Description: SYNCHRONOUS DRAM MODULE
• Manufacturer: Micron Technology

CAS Latency
between the registration of a READ command and the
availability of the first piece of output data. The latency
can be set to two or three clocks.
and the latency is m clocks, the data will be available
by clock edge n + m. The DQs will start driving as a
result of the clock edge one cycle earlier (n + m - 1),
and provided that the relevant access times are met,
the data will be valid by clock edge n + m. For example,
assuming that the clock cycle time is such that all rele-
vant access times are met, if a READ command is regis-
tered at T0 and the latency is programmed to two
clocks, the DQs will start driving after T1 and the data
will be valid by T2, as shown in Figure 6, CAS Latency
Diagram. Table 8, CAS Latency Table, indicates the
operating frequencies at which each CAS latency set-
ting can be used.
operation or incompatibility with future versions may
result.
32,64 Meg x 64 SDRAM DIMMs
SD8_16C32_64x64AG_C.fm - Rev. C 11/02
COMMAND
COMMAND
The CAS latency is the delay, in clock cycles,
If a READ command is registered at clock edge n,
Reserved states should not be used as unknown
Figure 6: CAS Latency Diagram
CLK
CLK
DQ
DQ
READ
READ
T0
T0
CAS Latency = 2
NOP
NOP
T1
T1
t
t AC
LZ
CAS Latency = 3
T2
T2
NOP
NOP
t
t AC
LZ
D
t OH
OUT
T3
T3
NOP
D
t OH
OUT
DON’T CARE
UNDEFINED
T4
10
Operating Mode
M7 and M8 to zero; the other combinations of values
for M7 and M8 are reserved for future use and/or test
modes. The programmed burst length applies to both
READ and WRITE bursts.
because unknown operation or incompatibility with
future versions may result.
Write Burst Mode
M2 applies to both READ and WRITE bursts; when
M9 = 1, the programmed burst length applies to READ
bursts, but write accesses are single-location (non-
burst) accesses.
Table 8:
The normal operating mode is selected by setting
Test modes and reserved states should not be used
When M9 = 0, the burst length programmed via M0–
SPEED
-13E
-133
-10E
Micron Technology, Inc., reserves the right to change products or specifications without notice.
CAS Latency Table
CAS LATENCY = 2
168-PIN SDRAM DIMMs
256MB / 512MB (x64)
£ 133
£ 100
£ 100
CLOCK FREQUENCY (MHZ)
ALLOWABLE OPERATING
CAS LATENCY = 3
©2002, Micron Technology Inc.
£ 143
£ 133
NA