CDP1805 Intersil Corporation, CDP1805 Datasheet - Page 26

• Manufacturer Part Number: CDP1805
• Description: CMOS 8-Bit Microprocessor with On-Chip RAM and Counter/Timer
• Manufacturer: Intersil Corporation

STATE
THE FOLLOWING ARE ALL LINKED INSTRUCTIONS “68” PRECEEDS ALL OP CODES, SO THERE IS A DUPLICATE FETCH
S1#1
S1#1
S1#1
S1#1
#2
#2
#2
S1
S1
S1
S1
S1
S1
S1
S1
S1
S1
S1
S1
S1
S1
S1
S1
S1
S1
S2
S2
S3
S1
S1
TABLE 2. CONDITIONS ON DATA BUS AND MEMORY ADDRESS LINES DURING ALL MACHINE STATES (Continued)
DMA OUT
DMA IN
INTER-
RUPT
C
C
C
C
C
C
C
D
E
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
0
0
I
DMA IN
INTER-
RUPT
DMA
OUT
0-F
0-F
N
C
D
C
7
E
F
4
4
0
1
2
3
4
5
9
F
E
0
1
A
B
D
7
6
8
INTERRUPT
MNEMONIC
DMA OUT
DMA IN
LONG
LONG
LONG
LONG
LONG
STPC
SKIP
SKIP
SKIP
SKIP
SKIP
NOP
NOP
AND
XOR
ADD
SHR
DTC
SEP
SEX
LDX
ANI
XRI
SDI
SHL
OR
SM
LDI
ORI
SMI
SD
ADI
CDP1805AC, CDP1806AC
TAKEN: RP + 1
NOT TAKEN: NO OPERATION
NOT TAKEN: NO OPERATION
NOT TAKEN: NO OPERATION
NOT TAKEN: NO OPERATION
NO OPERATION
NO OPERATION
N
N
MRX
MRX OR D
MRX AND D
MRX XOR D
MRX + D
MRX - D
D - MRX
LSB(D)
MRP
MRP OR D
MRP AND D
MRP XOR D
MRP + D
MRP - D
D - MRP
MSB(D)
BUS
MRO
X, P
1
STOP COUNTER CLOCK;
0
CNTR - 1
P; 2
P
X
32 PRESCALER
T; 0
MR0; R0 + 1
D
D; RP + 1
BUS; R0 + 1
OPERATION
DF; 0
DF; 0
DF, D; RP + 1
DF, D; RP + 1
DF, D
DF; D
X
DF, D; RP + 1
DF, D
CNTR
D
D; RP + 1
MIE
D
D; RP + 1
D; RP + 1
26
D
RP
MSB(D)
LSB(D)
RP
R0
R0
RP
RP
RP
RP
RP
RP
M(RP + 1)
M(RP + 1)
M(RP + 1)
M(RP + 1)
FROM I/O
DEVICE
HIGH Z
HIGH Z
HIGH Z
HIGH Z
HIGH Z
DATA
DATA
MRP
MRP
MRP
MRX
MRX
MRX
MRX
MRX
MRX
MRX
MRP
MRP
MRP
MRP
MRP
MRP
MRP
BUS
MR0
NN
NN
ADDRESS
MEMORY
RP + 1
RP + 1
RP + 1
RP + 1
RP
RP
RN
RN
RX
RX
RX
RX
RX
RX
RX
RX
RP
RN
R0
R0
R1
RP
RP
RP
RP
RP
RP
RP
RP
R0
MRD
0
0
0
0
0
0
0
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
0
1
1
1
1
MWR
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
1
1
1
1
1
1
LINES
N
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0