CDP1805 Intersil Corporation, CDP1805 Datasheet - Page 6

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CDP1805

Manufacturer Part Number
CDP1805
Description
CMOS 8-Bit Microprocessor with On-Chip RAM and Counter/Timer
Manufacturer
Intersil Corporation
Datasheet

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Dynamic Electrical Specifications
NOTES:
Timing Specifications
NOTE:
Minimum Set-Up And Hold Times (Note 2)
Minimum Pulse Width Times (Note 6)
High-Order Memory-Address Byte
High-Order Memory-Address Byte
Low-Order Memory-Address Byte
CPU Data to Bus
Required Memory Access Time, t
5. Typical values are for T
6. Maximum limits of minimum characteristics are the values above which all devices function.
7. Typical values are for T
Data Bus Input Set-Up, t
Data Bus Input Hold, t
DMA Set-Up, t
DMA Hold, t
ME Set-Up, t
ME Hold, t
Interrupt Set-Up, t
Interrupt Hold, t
WAIT Set-Up, t
EF1-4 Set-Up, t
EF1 -4 Hold, t
CLEAR Pulse Width, t
CLOCK Pulse Width, t
Set-Up to TPA
Hold after TPA Time, t
Hold after WR Time, t
Address to Data
MRD to TPA
Hold after WR Time, t
H
H
SU
H
SU
SU
H
SU
SU
Time, t
Time, t
H
H
WL
W
H
H
A
A
SU
= 25
= +25
as a function of T (T = 1 /f
SU
SU
o
ACC
o
C and nominal V
C and nominal V
PARAMETER
PARAMETER
at T
V
CDP1805AC, CDP1806AC
DD
A
DD
-0.1V; V
DD
= -40
.
CLOCK
.
o
to +85
DD
) at T
= 5V, 5%. (Continued)
o
A
C; C
6
= -40 to +85
L
= 50pF; Input t
o
C, V
DD
R
, t
= 5V, 15%
CDP1805AC, CDP1806AC
CDP1805AC CDP1806AC
(NOTE 5)
4.5T -440
T/2 -100
T/2 +75
F
2T-275
T +180
T +110
TYP
-100
-100
-125
TYP
= 10ns; Input Pulse Levels = 0.1V to
125
100
125
100
175
100
-75
20
75
0
(NOTE 7)
4.5T -330
T/2 +100
2T -175
T/2 -75
T +240
T +150
MAX
MAX
225
175
320
175
300
175
100
50
50
0
0
0
0
UNITS
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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