UPD64084 NEC, UPD64084 Datasheet - Page 10

• Manufacturer Part Number: UPD64084
• Description: THREE-DIMENSIONAL Y/C SEPARATION LSI WITH ON-CHIP MEMORY
• Manufacturer: NEC

10
57
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63-
72
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86
87
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No.
CLK8
RSTB
ST0
ST1
NSTD
DYCO0-
DYCO9
ALTF
LINE
KIL
CSI
AVDD
CBPC
ACO
AYO
CBPY
AGND
AGND
AYI
VCLY
VRBY
VRTY
VCOMY
AVDD
Symbol
I/O
I/O
I/O
O
O
O
O
O
O
O
O
O
O
O
O
I
I
I
I
-
-
-
I
-
LVTTL
3-state
Schmitt
LVTTL
LVTTL
LVTTL
LVTTL
3-state
LVTTL
LVTTL
LVTTL
Schmitt
Analog
Analog
Analog
Analog
Analog
Analog
Analog
Analog
Analog
Level
-
-
-
-
Table 1-1. Pin Functions (2/2)
3.3 V
6 mA
3.3 V
PU:50
3.3 V
3 mA
3.3 V
3 mA
3.3 V
3 mA
3.3 V
3 mA
3.3 V
3 mA
3.3 V
PD:50
3.3 V
PD:50
3.3 V
PU:50
2.5 V
2.5 V
2.5 V
2.5 V
2.5 V
2.5 V
2.5 V
2.5 V
2.5 V
PU/PD [k ]
Buffer type
Data Sheet S16021EJ2V0DS
-
-
-
-
CKMD = 0 : 8f
CKMD = 1 : 8fsc clock input
System reset input (Active-low)
(Active-low reset pulse is input from the outside.)
Internal signal monitor output 0
Internal signal monitor output 1
Nonstandard signal detection monitor output
('L' : standard, 'H' : nonstandard)
EXADINS=0: Digital YC signal alternate output
EXADINS=1: Digital video data input for external ADC (Pull
DYCO0 is the LSB, DYCO9 is the MSB.
EXADINS=0: Digital YC signal alternate flag output
EXADINS=1: 4f
Forced inter-line processing selection input
('L' : ordinary processing, 'H' : forced inter-line processing)
External killer input
('L' : ordinary processing, 'H' : forced Y/C separation stop)
Composite sync input (Active-low)
Y-DAC and C-DAC 2.5 V supply voltage
C-DAC phase compensation output
C-DAC analog C signal output
Y-DAC analog Y signal output
Y-DAC phase compensation output
Y-DAC and C-DAC ground
ADC ground
ADC analog composite signal input
ADC clamp potential output
ADC bottom reference voltage output
ADC top reference voltage output
ADC common mode reference voltage
ADC 2.5 V supply voltage
SC
down unuse lower bit pins via resistor)
('L' : C, 'H' : Y)
SC
clock output
clock output for external ADC
Description
PD64084