CX28344 Conexant, CX28344 Datasheet - Page 25
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CX28344
Manufacturer Part Number
CX28344
Description
(CX2834x) Dual / Triple / Quad / Hex / Octal - Enhanced DS3 / E3 Framer
Manufacturer
Conexant
Datasheet
1.CX28344.pdf
(195 pages)
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CX28342/3/4/6/8 Data Sheet
Table 1-7. Microprocessor Interface
28348-DSH-001-B
MOTO*
A[8:0]
AD[7:0]
ALE
CS*
DS*(RD*)
R/W*(WR*)
INTR*
DTACK*
Pin Label
CX28342 Pin # CX28343 Pin #
75–77, 79-83
87–95
105
104
106
101
102
107
100
75–77, 79-83
87–95
105
104
106
101
102
107
100
Mindspeed Technologies™
CX28344 Pin #
75–77, 79-83
87–95
105
104
106
101
102
107
100
Motorola Bus
Mode
Address Bus
Data Bus or
Address/Data
Address Strobe
Chip Select
Data Strobe or
Read Strobe
Read/Write
Direction or
Write Strobe
Interrupt
Request
Data Transfer
Acknowledge
Signal Name
IOPD
O/Z
O/Z
I/O
IPD
I
I
I
I
I
Selects Intel- or Motorola-style
microprocessor interface.
DS*, R/W*, A[8:0], and
AD[7:0] functions are affected.
0 = Motorola; AD[7:0] is data,
A[8:0] is address, DS* is data
strobe, and R/W* indicates
read (high) or write (low) data
direction.
1 = Intel; AD[7:0] is
multiplexed address/data,
A[7:0] is ignored, A[8] is
address, DS* is read strobe
(RD*), and R/W* is write
strobe (WR*).
Address used to identify a
register for subsequent read/
write data transfer cycle. In
Motorola bus mode, all nine
address bits (A[8:0]) are valid.
In Intel bus mode, only the
upper bit (A[8]) is used.
Multiplexed address/data
(Intel) or data only (Motorola).
Refer to MOTO* definition.
For Intel bus mode only, ALE
falling edge asynchronously
latches address from A[8:0]
(Motorola) or A[8]+AD[7:0]
(Intel) to identify one register
for subsequent read/write data
transfer cycle.
decoder. Active high ends
current read or write cycle and
places data bus output in high
impedance.
Active low read data strobe
(RD*) for MOTO* = 1, or data
strobe (DS*) for MOTO* = 0.
Active low write data strobe
(WR*) for MOTO* = 1, or data
select (R/W*) for MOTO* = 0.
Open drain active low output
signifies one or more pending
interrupt requests. INTR goes
to high impedance state.
Open drain active low output
signifies in-progress data
transfer cycle. Data ready
indication for read, transaction
end indication for write
Active low enables read/write
Definition
Product Description
1
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15
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