BS62LV2000SC BSI [Brilliance Semiconductor], BS62LV2000SC Datasheet

BS62LV2000SC

Manufacturer Part Number

BS62LV2000SC

Description

Very Low Power/Voltage CMOS SRAM 256K X 8 bit

Manufacturer

BSI [Brilliance Semiconductor]

Datasheet

1.BS62LV2000SC.pdf (10 pages)

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R0201-BS62LV2000

• Wide Vcc operation voltage : 2.7V ~ 5.5V

• Very low power consumption :

• High speed access time :

• Automatic power down when chip is deselected

• Three state outputs and TTL compatible

• Fully static operation

• Data retention supply voltage as low as 1.5V

• Easy expansion with CE2, CE1, and OE options

• All I/O pins are 3V/5V tolerant

BS62LV2000TC

BS62LV2000STC

BS62LV2000SC

BS62LV2000TI

BS62LV2000STI

BS62LV2000SI

PRODUCT FAMILY

PIN CONFIGURATIONS

Brilliance Semiconductor Inc

FEATURES

Vcc = 3.0V

Vcc = 5.0V

VCC

CE2

-70

-10

A11

A13

A15

A17

A16

A14

A12

PRODUCT

FAMILY

GND

DQ0

DQ1

DQ2

A17

A16

A14

A12

BSI

100ns(Max.) at Vcc = 3.0V

70ns(Max.) at Vcc = 3.0V

BS62LV2001SC

BS62LV2001SI

0.15uA (Typ.) CMOS standby current

C-grade : 20mA (Max.) operating current

C-grade : 40mA (Max.) operating current

I- grade : 25mA (Max.) operating current

I- grade : 45mA (Max.) operating current

3uA (Typ.) CMOS standby current

BS62LV2000TC

BS62LV2000STC

BS62LV2000TI

BS62LV2000STI

TEMPERATURE

- 40 C to +85

OPERATING

C to +70

Very Low Power/Voltage CMOS SRAM

256K X 8 bit

VCC

A15

CE2

A13

A11

A10

CE1

DQ7

DQ6

DQ5

DQ4

DQ3

A10

CE1

DQ7

DQ6

DQ5

DQ4

DQ3

GND

DQ2

DQ1

DQ0

. reserves the right to modify document contents without notice.

2.7V ~ 5.5V

RANGE

Vcc

Vcc=3V

SPEED

70 / 100

(ns)

The BS62LV2000 is a high performance, very low power CMOS

Static Random Access Memory organized as 262,144 words by 8 bits

and operates from a wide range of 2.7V to 5.5V supply voltage.

Advanced CMOS technology and circuit techniques provide both high

speed and low power features with a typical CMOS standby current of

0.15uA and maximum access time of 70ns in 3V operation.

Easy memory expansion is provided by an active LOW chip

enable (CE1), an active HIGH chip enable (CE2), and active LOW

output enable (OE) and three-state output drivers.

The BS62LV2000 has an automatic power down feature, reducing the

power consumption significantly when chip is deselected.

The BS62LV2000 is available in the JEDEC standard 32 pin

450mil Plastic SOP, 8mmx13.4mm STSOP and 8mmx20mm TSOP.

BLOCK DIAGRAM

DESCRIPTION

DQ0

DQ1

DQ2

DQ3

DQ4

DQ5

DQ6

DQ7

CE1

CE2

A15

A16

A14

A12

Vdd

Gnd

A13

A17

Vcc=5V

10uA

20uA

STANDBY

CCSB1

Address

Buffer

Input

POWER DISSIPATION

Control

, Max)

Vcc=3V Vcc=5V Vcc=3V

3uA

5uA

Output

Buffer

Data

Input

Data

Decoder

45mA

Row

Operating

1024

, Max)

20mA

25mA

BS62LV2000

A11

Address Input Buffer

Column Decoder

Memory Array

A8 A3 A2 A1

Sense Amp

Write Driver

Column I/O

1024 x 2048

TSOP

STSOP

SOP

TSOP

STSOP

SOP

PKG TYPE

2048

256

Revision 2.3

April 2002

A10

Related parts for BS62LV2000SC

BS62LV2000SC Summary of contents

Page 1

... Data retention supply voltage as low as 1.5V • Easy expansion with CE2, CE1, and OE options • All I/O pins are 3V/5V tolerant PRODUCT FAMILY PRODUCT OPERATING FAMILY TEMPERATURE BS62LV2000TC +70 BS62LV2000STC +0 BS62LV2000SC BS62LV2000TI +85 BS62LV2000STI BS62LV2000SI PIN CONFIGURATIONS 1 A11 ...

Page 2

BSI PIN DESCRIPTIONS Name A0-A17 Address Input CE1 Chip Enable 1 Input CE2 Chip Enable 2 Input WE Write Enable Input OE Output Enable Input DQ0-DQ7 Data Input/Output Ports Vcc Gnd TRUTH TABLE MODE WE X Not selected (Power Down) ...

Page 3

BSI DC ELECTRICAL CHARACTERISTICS PARAMETER PARAMETER NAME Guaranteed Input Low V IL (2) Voltage Guaranteed Input High V IH Voltage (2) I Input Leakage Current IL I Output Leakage Current OL V Output Low Voltage OL V Output High Voltage ...

Page 4

BSI AC TEST CONDITIONS Input Pulse Levels Input Rise and Fall Times Input and Output Timing Reference Level AC TEST LOADS AND WAVEFORMS Ω 1269 3.3V OUTPUT OUTPUT 100PF INCLUDING Ω 1404 JIG AND SCOPE FIGURE 1A THEVENIN EQUIVALENT Ω ...

Page 5

BSI SWITCHING WAVEFORMS (READ CYCLE) (1,2,4) READ CYCLE1 ADDRESS D OUT (1,3,4) READ CYCLE2 CE1 CE2 D OUT (1,4) READ CYCLE3 ADDRESS OE CE1 CE2 D OUT NOTES high in read Cycle. 2. Device is continuously selected ...

Page 6

BSI AC ELECTRICAL CHARACTERISTICS WRITE CYCLE JEDEC PARAMETER PARAMETER NAME NAME t t AVAX E1LWH AVWL AVWH WLWH WHAX WR1 t t E2LAX WR2 t ...

Page 7

BSI (1,6) WRITE CYCLE2 ADDRESS CE1 CE2 WE D OUT D IN NOTES must be high during address transitions. 2. The internal write time of the memory is defined by the overlap of CE1 and CE2 active and ...

Page 8

BSI ORDERING INFORMATION BS62LV2000 PACKAGE DIMENSIONS STSOP - 32 R0201-BS62LV2000 BS62LV2000 SPEED 70: 70ns 10: 100ns GRADE + - + PACKAGE T: ...

Page 9

BSI PACKAGE DIMENSIONS (continued) TSOP - 32 SOP -32 R0201-BS62LV2000 b WITH PLATING BASE METAL SECTION A-A 9 BS62LV2000 Revision 2.3 April 2002 ...

Page 10

BSI REVISION HISTORY Revision Description 2.2 2001 Data Sheet release 2.3 Modify some AC parameters R0201-BS62LV2000 Date Apr. 15, 2001 April,11,2002 10 BS62LV2000 Note Revision 2.3 April 2002 ...

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