AM29LV081B-90EE AMD [Advanced Micro Devices], AM29LV081B-90EE Datasheet - Page 12

• Manufacturer Part Number: AM29LV081B-90EE
• Description: 8 Megabit (1 M x 8-Bit) CMOS 3.0 Volt-only Uniform Sector Flash Memory
• Manufacturer: AMD [Advanced Micro Devices]

Sector Protection/Unprotection
The hardware sector protection feature disables both
program and erase operations in any sector. The hard-
ware sector unprotection feature re-enables both pro-
gram and erase operations in previously protected
sectors. Sector protection/unprotection can be imple-
mented via two methods.
The primary method requires V
only, and can be implemented either in-system or via
programming equipment. Figure 2 shows the algo-
rithms and Figure 21 shows the timing diagram. This
method uses standard microprocessor bus cycle tim-
ing. For sector unprotect, all unprotected sectors must
first be protected prior to the first sector unprotect write
cycle.
The alternate method intended only for programming
equipment requires V
RESET#. This method is compatible with programmer
routines written for earlier 3.0 volt-only AMD flash de-
vices. Publication number 21225 contains further de-
tails; contact an AMD representative to request a copy.
The device is shipped with all sectors unprotected.
AMD offers the option of programming and protecting
sectors at its factory prior to shipping the device
through AMD’s ExpressFlash™ Service. Contact an
AMD representative for details.
It is possible to determine whether a sector is protected
or unprotected. See “Autoselect Mode” for details.
Temporary Sector Unprotect
This feature allows temporary unprotection of previ-
ously protected sectors to change data in-system. The
Sector Unprotect mode is activated by setting the RE-
SET# pin to V
sectors can be programmed or erased by selecting the
sector addresses. Once V
SET# pin, all the previously protected sectors are
protected again. Figure 1 shows the algorithm, and
Figure 20 shows the timing diagrams, for this feature.
Hardware Data Protection
The command sequence requirement of unlock cycles
for programming or erasing provides data protection
against inadvertent writes (refer to Table 4 for com-
mand definitions). In addition, the following hardware
data protection measures prevent accidental erasure
or programming, which might otherwise be caused by
spurious system level signals during V
power-down transitions, or from system noise.
10
ID
. During this mode, formerly protected
ID
on address pin A9, OE#, and
ID
is removed from the RE-
ID
on the RESET# pin
CC
power-up and
D A T A S H E E T
Am29LV081B
Low V
When V
cept any write cycles. This protects data during V
power-up and power-down. The command register and
all internal program/erase circuits are disabled, and the
device resets. Subsequent writes are ignored until V
is greater than V
proper signals to the control pins to prevent uninten-
tional writes when V
Write Pulse “Glitch” Protection
Noise pulses of less than 5 ns (typical) on OE#, CE# or
WE# do not initiate a write cycle.
Logical Inhibit
Write cycles are inhibited by holding any one of OE# =
V
CE# and WE# must be a logical zero while OE# is a
logical one.
Power-Up Write Inhibit
If WE# = CE# = V
device does not accept commands on the rising edge
of WE#. The internal state machine is automatically
reset to reading array data on power-up.
Notes:
1. All protected sectors unprotected.
2. All previously protected sectors are protected once
Figure 1. Temporary Sector Unprotect Operation
IL
, CE# = V
again.
CC
CC
Write Inhibit
is less than V
IH
or WE# = V
IL
LKO
and OE# = V
CC
Unprotect Completed
Program Operations
. The system must provide the
Temporary Sector
Perform Erase or
is greater than V
RESET# = V
RESET# = V
LKO
21525D6 October 12, 2006
(Note 1)
(Note 2)
START
IH
, the device does not ac-
. To initiate a write cycle,
IH
during power up, the
ID
IH
LKO
.
CC
CC