AM29LV081B-90EE AMD [Advanced Micro Devices], AM29LV081B-90EE Datasheet - Page 9

• Manufacturer Part Number: AM29LV081B-90EE
• Description: 8 Megabit (1 M x 8-Bit) CMOS 3.0 Volt-only Uniform Sector Flash Memory
• Manufacturer: AMD [Advanced Micro Devices]

DEVICE BUS OPERATIONS
This section describes the requirements and use of the
device bus operations, which are initiated through the
internal command register. The command register it-
self does not occupy any addressable memory loca-
tion. The register is composed of latches that store the
commands, along with the address and data informa-
tion needed to execute the command. The contents of
Legend:
L = Logic Low = V
Notes:
1. Addresses are A19–A0.
2. The sector protect and sector unprotect functions may also be implemented via programming equipment. See the “Sector
Requirements for Reading Array Data
To read array data from the outputs, the system must
drive the CE# and OE# pins to V
control and selects the device. OE# is the output con-
trol and gates array data to the output pins. WE# should
remain at V
The internal state machine is set for reading array
data upon device power-up, or after a hardware reset.
This ensures that no spurious alteration of the mem-
ory content occurs during the power transition. No
command is necessary in this mode to obtain array
data. Standard microprocessor read cycles that as-
sert valid addresses on the device address inputs pro-
duce valid data on the device data outputs. The device
remains enabled for read access until the command
register contents are altered.
See “Reading Array Data” for more information. Refer
to the AC Read Operations table for timing specifica-
tions and to Figure 13 for the timing diagram. I
the DC Characteristics table represents the active cur-
rent specification for reading array data.
21525D6 October 12, 2006
Read
Write
Standby
Output Disable
Reset
Sector Protect (Note 2)
Sector Unprotect (Note 2)
Temporary Sector Unprotect
Protection/Unprotection” section.
IH
Operation
.
IL
, H = Logic High = V
Table 1. Am29LV081B Device Bus Operations
IL
. CE# is the power
IH
, V
V
0.3 V
CE#
ID
CC
X
X
L
L
L
L
L
= 12.0 ± 0.5 V, X = Don’t Care, A
±
D A T A S H E E T
CC1
OE#
Am29LV081B
H
X
H
X
H
H
X
L
in
WE#
H
X
H
X
X
L
L
L
the register serve as inputs to the internal state ma-
chine. The state machine outputs dictate the function of
the device. Table 1 lists the device bus operations, the
inputs and control levels they require, and the resulting
output. The following subsections describe each of
these operations in further detail.
Writing Commands/Command Sequences
To write a command or command sequence (which in-
cludes programming data to the device and erasing
sectors of memory), the system must drive WE# and
CE# to V
The device features an Unlock Bypass mode to facili-
tate faster programming. Once the device enters the Un-
lock Bypass mode, only two write cycles are required to
program a byte, instead of four. The “Byte Program
Command Sequence” section has details on program-
ming data to the device using both standard and Unlock
Bypass command sequences.
An erase operation can erase one sector, multiple sec-
tors, or the entire device. Table 2 indicate the address
space that each sector occupies. A “sector address”
consists of the address bits required to uniquely select
a sector. The “Command Definitions” section has de-
tails on erasing a sector or the entire chip, or suspend-
ing/resuming the erase operation.
After the system writes the autoselect command se-
quence, the device enters the autoselect mode. The
system can then read autoselect codes from the inter-
RESET#
V
0.3 V
V
V
V
CC
H
H
H
L
IL
ID
ID
ID
, and OE# to V
±
IN
= Address In, D
Sector Address, A6 = H,
Sector Address, A6 = L,
Addresses (Note 1)
A1 = H, A0 = L
A1 = H, A0 = L
IH
A
A
X
X
X
X
.
IN
IN
IN
= Data In, D
OUT
DQ0–DQ7
High-Z
High-Z
High-Z
= Data Out
D
D
OUT
X
X
X
IN
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