74ALVCH16841DGG,11 NXP Semiconductors, 74ALVCH16841DGG,11 Datasheet - Page 6

IC 20BIT BUS INTRFC D 56TSSOP

74ALVCH16841DGG,11

Manufacturer Part Number
74ALVCH16841DGG,11
Description
IC 20BIT BUS INTRFC D 56TSSOP
Manufacturer
NXP Semiconductors
Series
74ALVCHr
Type
D-Typer
Datasheet

Specifications of 74ALVCH16841DGG,11

Logic Type
D-Type Transparent Latch
Package / Case
56-TSSOP
Circuit
10:10
Output Type
Tri-State
Voltage - Supply
2.3 V ~ 3.6 V
Independent Circuits
2
Delay Time - Propagation
2.5ns
Current - Output High, Low
24mA, 24mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Number Of Circuits
2
Logic Family
ALVC
Polarity
Non-Inverting
Input Bias Current (max)
0.2 uA
High Level Output Current
- 24 mA
Low Level Output Current
24 mA
Propagation Delay Time
2.4 ns at 3.3 V
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.3 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Number Of Bits
20
Number Of Elements
2
Latch Mode
Transparent
Technology
CMOS
Package Type
TSSOP
Operating Supply Voltage (typ)
2.5/3.3V
Operating Supply Voltage (min)
2.3V
Operating Supply Voltage (max)
3.6V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
56
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
74ALVCH16841DG-T
74ALVCH16841DG-T
935259090118
1. All typical values are at V
1. All typical values are measured T
2. Typical value is measured at V
Philips Semiconductors
AC CHARACTERISTICS FOR V
GND = 0V; t
NOTE:
AC CHARACTERISTICS FOR V
GND = 0V; t
NOTES:
1998 Jul 27
SYMBOL
t
t
t
t
20-bit bus interface D-type latch (3-State)
PLH
PLH
PZH
PHZ
SYMBOL
t
t
t
t
PLH
PLH
PZH
PHZ
t
t
SU
t
W
/t
/t
h
/t
/t
t
t
T
PHL
PHL
SU
PZL
PLZ
W
/t
/t
/t
/t
h
PHL
PHL
PZL
PLZ
r
r
= t
= t
f
f
Propagation delay
nD
Propagation delay
nLE to nQ
3-State output enable time
nOE
3-State output disable time
nOE
nLE pulse width HIGH
Set up time nD
Hold time nD
2.0ns; C
2.5ns; C
n
Propagation delay
nD
Propagation delay
nLE to nQ
3-State output enable time
nOE
3-State output disable time
nOE
nLE pulse width HIGH
Set up time nD
Hold time nD
to nQ
n
n
to nQ
to nQ
n
to nQ
n
n
PARAMETER
L
L
n
n
to nQ
to nQ
CC
= 30pF
= 50pF
n
n
n
= 3.3V and T
n
n
n
to nLE
n
n
CC
to nLE
PARAMETER
n
amb
n
to nLE
= 3.3V
to nLE
= 25 C.
CC
CC
amb
= 2.3V TO 2.7V RANGE
= 3.0V TO 3.6V RANGE AND V
= 25 C.
WAVEFORM
1, 5
2, 5
4, 5
4, 5
2, 5
3, 5
3, 5
WAVEFORM
6
MIN
1, 5
2, 5
4, 5
4, 5
2, 5
3, 5
3, 5
1.0
1.0
1.0
1.3
3.3
1.0
1.4
V
CC
LIMITS
= 3.3
TYP
CC
2.4
2.4
2.3
2.9
1.5
0.6
0.2
1, 2
= 2.7V
0.3V
MIN
1.0
1.0
1.0
1.1
3.3
1.3
1.4
MAX
3.9
4.3
4.9
4.1
V
CC
= 2.3 to 2.7V
LIMITS
MIN
TYP
1.0
1.0
1.0
1.3
3.3
1.1
1.7
2.5
2.5
2.7
2.2
1.5
0.1
0.3
1
74ALVCH16841
V
CC
LIMITS
TYP
2.6
2.6
3.1
3.1
1.5
0.1
0.2
= 2.7V
MAX
1
5.0
5.6
6.2
5.3
Product specification
MAX
4.7
5.1
6.0
4.3
UNIT
ns
ns
ns
ns
ns
ns
ns
UNIT
ns
ns
ns
ns
ns
ns
ns

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