ZL50012/GDC ZARLINK [Zarlink Semiconductor Inc], ZL50012/GDC Datasheet - Page 13

• Manufacturer Part Number: ZL50012/GDC
• Description: Flexible 512-ch Digital Switch
• Manufacturer: ZARLINK [Zarlink Semiconductor Inc]

The device also accepts positive or negative input frame pulse and ST-BUS input clock formats via the
programming of the FPINP and CKINP bits in the Internal Mode Selection (IMS) register. By default, the device
accepts the negative input clock format.
Figure 4, Figure 5 and Figure 6 describe the usage of CKIN2 - 0, FPINP and CKINP in the Internal Mode Selection
(IMS) register:
(16.384MHz)
(16.384MHz)
(4.096MHz)
(4.096MHz)
(8.192MHz)
(8.192MHz)
CKINP = 1
CKINP = 1
CKINP = 0
CKINP = 0
CKINP = 0
CKINP = 1
FPINP = 0
FPINP = 1
FPINP = 0
FPINP = 1
FPINP = 0
FPINP = 1
Figure 4 - Input Timing when (CKIN2 to CKIN0 bits = 010) in the Control Register
Figure 5 - Input Timing when (CKIN2 to CKIN0 bits = 001) in the Control Register
Figure 6 - Input Timing when (CKIN2 to CKIN0 bits = 000) in the Control Register
(8kHz)
CKi
CKi
CKi
CKi
CKi
CKi
FPi
FPi
FPi
FPi
FPi
FPi
Input Frame Boundary
Input Frame Boundary
Input Frame Boundary
Zarlink Semiconductor Inc.
ZL50012
16
Input Frame Boundary
Input Frame Boundary
Input Frame Boundary
Data Sheet