ZL50012/GDC ZARLINK [Zarlink Semiconductor Inc], ZL50012/GDC Datasheet - Page 28
![no-image](/images/no-image-200.jpg)
ZL50012/GDC
Manufacturer Part Number
ZL50012/GDC
Description
Flexible 512-ch Digital Switch
Manufacturer
ZARLINK [Zarlink Semiconductor Inc]
Datasheet
1.ZL50012GDC.pdf
(65 pages)
- Current page: 28 of 65
- Download datasheet (2Mb)
2.7
By programming the input stream control registers (SICR0 to 15), users can divide one frame of input data into four
quadrant frames and can force the Least Significant Bit (LSB, bit 0 in Figure 7 on page 17), of every input channel
in these quadrants into "1" for the bit robbed signaling purpose. The four quadrant frames are defined as shown in
Table 9.
When a quadrant frame enable bit (STIN#QEN0, STIN#QEN1, STIN#QEN2 or STIN#QEN3) is set to high, the LSB
of every input channels in the quadrant is forced to "1". See Table 10 to Table 13 for details:
2.048 Mb/s
4.096 Mb/s
8.192 Mb/s
Data Rate
Quadrant frame programming
STIN#QEN0
STIN#QEN1
STIN#QEN2
STIN#QEN3
1
0
1
0
1
0
1
0
Quadrant 0
Ch 0 to 15
Ch 0 to 31
Ch 0 to 7
Table 9 - Definition of the Four Quadrant Frames
Table 10 - Quadrant Frame 0 LSB Replacement
Table 13 - Quadrant Frame 3 LSB Replacement
Table 11 - Quadrant Frame 1 LSB Replacement
Table 12 - Quadrant Frame 2 LSB Replacement
Replace LSB of every channel in Quadrant 0 with "1"
No bit replacement occurs in Quadrant 0
Replace LSB of every channel in Quadrant 1 with "1"
No bit replacement occurs in Quadrant 1
Replace LSB of every channel in Quadrant 2 with "1"
No bit replacement occurs in Quadrant 2
Replace LSB of every channel in Quadrant 3 with "1"
No bit replacement occurs in Quadrant 3
Zarlink Semiconductor Inc.
ZL50012
Quadrant 1
Ch 16 to 31
Ch 32 to 63
Ch 8 to 15
31
Action
Action
Action
Action
Quadrant 2
Ch 32 to 47
Ch 64 to 95
Ch 16 to 23
Ch 96 to 127
Quadrant 3
Ch 24 to 31
Ch 48 to 63
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