ZL50015GAC ZARLINK [Zarlink Semiconductor Inc], ZL50015GAC Datasheet - Page 77

• Manufacturer Part Number: ZL50015GAC
• Description: Enhanced 1 K Digital Switch with Stratum 4E DPLL
• Manufacturer: ZARLINK [Zarlink Semiconductor Inc]

15 - 12
11 - 9
MML
External Read/Write Address: 006A
Reset Value: 0000
15
R3
External Read Only Address: 006B
Bit
15
Bit
0
1
0
MMU
14
R3
14
R3FS2 - 0
0
Unused
Name
R0MU
Name
R0ML
13
R3
ML
H
Table 41 - Reference Frequency Status Register (RFSR) Bits - Read only
13
0
MU
12
R3
Reserved. In normal functional mode, these bits are zero.
Reference 3 Frequency Status Bits
These bits report detected frequency of REF3.
Table 40 - Reference Mask Register (RMR) Bits (continued)
12
0
Reference 0 Single-period Lower Limit Mask Bit
When this bit is high, it masks the single-period lower limit check (or forces pass) for
REF0.
Reference 0 Single-period Upper Limit Mask Bit
When this bit is high, it masks the single-period upper limit check (or forces pass) for
REF0.
MML
R3FS
R2
H
11
H
11
2
R3FS2
MMU
R3FS
10
R2
0
0
0
0
1
1
1
1
10
1
R3FS
R2
ML
9
R3FS1
9
0
Zarlink Semiconductor Inc.
0
0
1
1
0
0
1
1
ZL50015
R2FS
MU
R2
8
8
2
77
R3FS0
MML
R2FS
0
1
0
1
0
1
0
1
R1
7
7
1
Description
Description
MMU
R2FS
R1
6
6
0
REF3 Frequency Measurement
R1FS
ML
R1
5
5
2
16.384 MHz
1.544 MHz
2.048 MHz
4.096 MHz
8.192 MHz
19.44 MHz
Reserved
R1FS
MU
R1
4
8 kHz
4
1
R1FS
MML
R0
3
3
0
R0FS
MMU
R0
2
2
2
R0FS
Data Sheet
ML
R0
1
1
1
R0FS
MU
R0
0
0
0