AM79C940KCW AMD [Advanced Micro Devices], AM79C940KCW Datasheet - Page 121

• Manufacturer Part Number: AM79C940KCW
• Description: Media Access Controller for Ethernet (MACE)
• Manufacturer: AMD [Advanced Micro Devices]

B-4
“61 (BC_1,
“60 (BC_1,
“59 (BC_1,
“58 (BC_1,
“57 (BC_1,
“56 (BC_1,
“55 (BC_1,
“54 (BC_1,
“53 (BC_1,
“52 (BC_1,
“51 (BC_1,
“50 (BC_1,
“49 (BC_1,
“48 (BC_1,
“47 (BC_1,
“46 (BC_1,
“45 (BC_1,
“44 (BC_1,
“43 (BC_1,
“42 (BC_1,
“41 (BC_1,
“40 (BC_1,
“39 (BC_1,
“38 (BC_1,
“37 (BC_1,
“36 (BC_1,
“35 (BC_1,
“34 (BC_1,
“33 (BC_1,
“32 (BC_1,
“31 (BC_1,
“30 (BC_1,
“29 (BC_1,
“28 (BC_1,
“27 (BC_1,
“26 (BC_1,
“25 (BC_1,
“24 (BC_1,
“23 (BC_1,
“22 (BC_1,
“21 (BC_1,
“20 (BC_1,
“19 (BC_1,
“18 (BC_1,
“17 (BC_1,
“16 (BC_1,
“15 (BC_1,
“14 (BC_1,
“13 (BC_4,
“12 (BC_1,
“11 (BC_1,
“10 (BC_1,
“9
AMD
(BC_1,
*,
*,
RESET_L,
SLEEP_L,
INTR_L,
*,
TC_L,
DBUS(0),
DBUS(0),
DBUS(1),
DBUS(1),
DBUS(2),
DBUS(2),
DBUS(3),
DBUS(3),
DBUS(4),
DBUS(4),
DBUS(5),
DBUS(5),
DBUS(6),
DBUS(6),
DBUS(7),
DBUS(7),
DBUS(8),
DBUS(8),
DBUS(9),
DBUS(9),
DBUS(10),
DBUS(10),
DBUS(11),
DBUS(11),
DBUS(12),
DBUS(12),
DBUS(13),
DBUS(13),
DBUS(14),
DBUS(14),
DBUS(15),
DBUS(15),
*,
EOF_L,
EOF_L,
*,
DTV_L,
*,
FDS_L,
BE0_L,
BE1_L,
SCLK,
TDTREQ_L,
RDTREQ_L,
*,
ADD(0),
control,
control,
input,
input,
control,
input,
input,
output3,
input,
output3,
input,
output3,
input,
output3,
input,
output3,
input,
output3,
input,
output3,
input,
output3,
input,
output3,
input,
output3,
input,
output3,
input,
output3,
input,
output3,
input,
output3,
input,
output3,
input,
output3,
control,
control,
control,
clock,
output3,
output3,
control,
output3,
0),” &
input,
output3,
output3,
input,
input,
input,
input,
Am79C940
0),” &
0),” &
X,
X,
X,
X,
X,
X,
X,
X,
X,
X,
X,
X,
X,
X,
X,
X,
0),” &
0),” &
0),” &
X,
X,
0),” &
1),” &
1),” &
1,
1),” &
0),” &
35,
0),” &
35,
0),” &
35,
0),” &
35,
0),” &
35,
0),” &
35,
0),” &
35,
0),” &
35,
0),” &
35,
0),” &
35,
– TRI DBUS(9:0)
0),” &
22,
0),” &
22,
0),” &
22,
0),” &
22,
0),” &
22,
0),” &
22,
X,
X,
1),” &
10,
10,
– TRI SF_BD/SRD
57,
– TRI INTR_L
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
– TRI DBUS(15:10)
1),” &
19,
– TRI EOF_L
17,
– TRI DTV_L
1),” &
1),” &
1),” &
0,
0,
– TRI TDTREQ_L/RDTREQ_L
0),” &
0,
Z); &
Z); &
Z); &
Z); &
Z); &
Z); &
Z); &
Z); &
Z); &
Z); &
Z); &
Z); &
Z); &
Z); &
Z); &
Z); &
0,
0,
Z); &
Z); &
Weak1),” &
Z); &
Z); &