ZL50062 ZARLINK [Zarlink Semiconductor Inc], ZL50062 Datasheet - Page 48
![no-image](/images/no-image-200.jpg)
ZL50062
Manufacturer Part Number
ZL50062
Description
16K-Channel Digital Switch with High Jitter Tolerance, Single Rate (2, 4, 8, or 16Mbps), and 64 Inputs and 64 Outputs
Manufacturer
ZARLINK [Zarlink Semiconductor Inc]
Datasheet
1.ZL50062.pdf
(68 pages)
Bit
12
11
10
9
8
7
6
5
4
3
2
1
0
BISTSDB
BISTCDB
BISTPDB
BISTSCB
BISTCCB
BISTPCB
BISTSDL
BISTCDL
BISTPDL
BISTSCL
BISTCCL
BISTPCL
LV_TM
Name
Reset
Value
Table 23 - Memory BIST Register (MBISTR) Bits (continued)
0
0
0
0
0
0
0
0
0
0
0
0
0
MBIST Test Enable
Set HIGH to enable MBIST mode.
Set LOW for normal operation.
Backplane Data Memory Start BIST Sequence
Sequence enabled on LOW to HIGH transition.
Backplane Data Memory BIST Sequence Completed (Read-only)
This bit must be polled - when HIGH, indicates completion of Backplane Data
Memory BIST sequence.
Backplane Data Memory Pass/Fail Bit (Read-only)
This bit indicates the Pass/Fail status following completion of the Backplane
Data Memory BIST sequence (indicated by assertion of BISTCDB).
A HIGH indicates Pass, a LOW indicates Fail.
Local Data Memory Start BIST Sequence
Sequence enabled on LOW to HIGH transition.
Local Data Memory BIST Sequence Completed (Read-only)
This bit must be polled - when HIGH, indicates completion of Local Data
Memory BIST sequence.
Local Data Memory Pass/Fail Bit (Read-only)
This bit indicates the Pass/Fail status following completion of the Local Data
Memory BIST sequence (indicated by assertion of BISTCDL).
A HIGH indicates Pass, a LOW indicates Fail.
Backplane Connection Memory Start BIST Sequence
Sequence enabled on LOW to HIGH transition.
Backplane Connection Memory BIST Sequence Completed (Read-only)
This bit must be polled - when HIGH, indicates completion of Backplane
Connection Memory BIST sequence.
Backplane Connection Memory Pass/Fail Bit (Read-only)
This bit indicates the Pass/Fail status following completion of the Backplane
Connection Memory BIST sequence (indicated by assertion of BISTCCB).
A HIGH indicates Pass, a LOW indicates Fail.
Local Connection Memory Start BIST Sequence
Sequence enabled on LOW to HIGH transition.
Local Connection Memory BIST Sequence Completed (Read-only)
This bit must be polled - when HIGH, indicates completion of Local Connection
Memory BIST sequence.
Local Connection Memory Pass/Fail Bit (Read-only)
This bit indicates the Pass/Fail status following completion of the Local
Connection Memory BIST sequence (indicated by assertion of BISTCCL).
A HIGH indicates Pass, a LOW indicates Fail.
Zarlink Semiconductor Inc.
ZL50062/4
48
Description
Data Sheet