ZL50062 ZARLINK [Zarlink Semiconductor Inc], ZL50062 Datasheet - Page 57
![no-image](/images/no-image-200.jpg)
ZL50062
Manufacturer Part Number
ZL50062
Description
16K-Channel Digital Switch with High Jitter Tolerance, Single Rate (2, 4, 8, or 16Mbps), and 64 Inputs and 64 Outputs
Manufacturer
ZARLINK [Zarlink Semiconductor Inc]
Datasheet
1.ZL50062.pdf
(68 pages)
- Current page: 57 of 68
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L/BSTo0-31
L/BSTo0-31
L/BSTo0-31
L/BSTi0-31
L/BSTi0-31
L/BSTi0-31
Note *: CK_int is the internal clock signal of 131.072MHz
8.192Mbps
4.096Mbps
2.048Mbps
8.192Mbps
4.096Mbps
2.048Mbps
CK_int *
CK_int *
FP8o
FP8i
C8o
C8i
Figure 20 - ST-BUS Local/Backplane Data Timing Diagram (8Mbps, 4Mbps, 2Mbps)
Ch31
Ch127
Bit0
Bit1
1
Ch31
Bit0
Ch63
Bit0
Ch63
Bit0
Ch127
Bit0
0
t
t
OFBOS
IDS4
Ch0
Bit7
t
7
SOD8
t
SOD4
t
SOD2
t
t
SIS8
Ch0
Bit7
IDS8
t
SIH8
t
IDS2
Zarlink Semiconductor Inc.
Bit7
Ch0
Ch0
ZL50062/4
Bit6
6
t
SIS4
t
SIH4
57
Ch0
Bit7
Ch0
Bit5
5
Bit7
Ch0
Ch0
Bit6
Ch0
Bit6
t
SIS2
Bit4
Ch0
4
t
SIH2
Ch0
Bit3
3
Ch0
Bit5
Ch0
Bit5
Bit2
Ch0
2
Bit6
Ch0
Ch0
Bit1
1
Ch0
Bit6
Data Sheet
Ch0
Ch0
Bit4
Bit4
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