AM79C973VCW AMD [Advanced Micro Devices], AM79C973VCW Datasheet - Page 286
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AM79C973VCW
Manufacturer Part Number
AM79C973VCW
Description
Manufacturer
AMD [Advanced Micro Devices]
Datasheet
1.AM79C973VCW.pdf
(304 pages)
- Current page: 286 of 304
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C7
S6
C8
286
After filling the second buffer and performing
the last chance lookahead to the next descrip-
tor, the Am79C973 controller will write the sta-
tus and change the ownership bit of descriptor
number 2.
After the ownership of descriptor number 2 has
been changed by the Am79C973 controller,
the next driver poll of the second descriptor will
show ownership granted to the CPU. The
driver now copies the data from buffer number
2 into the middle section of the application
buffer space. This operation is interleaved with
the C7 and C8 operations.
The Am79C973 controller will perform data
DMA to the last buffer, whose pointer is point-
ing to application space. Data entering the
least buffer will not need the infamous double
cation pointer into this descriptor and then
changed the ownership to give the descriptor
to the Am79C973 controller back at S3. Note
that if steps S1, S2, and S3 have not com-
pleted at this time, a BUFF error will result.
P R E L I M I N A R Y
Am79C973/Am79C975
N2
S7
C9
S8
S9
S10
copy that is required by existing drivers, since
it is being placed directly into the application
buffer space.
The message on the wire ends.
When the driver completes the copy of buffer
number 2 data to the application buffer space,
it begins polling descriptor number 3.
When the Am79C973 controller has finished
all data DMA operations, it writes status and
changes ownership of descriptor number 3.
The driver sees that the ownership of descrip-
tor number 3 has changed, and it calls the ap-
plication to tell the application that a frame has
arrived.
The application processes the received frame
and generates the next TX frame, placing it
into a TX buffer.
The driver sets up the TX descriptor for the
Am79C973 controller.
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