AM79C973VCW AMD [Advanced Micro Devices], AM79C973VCW Datasheet - Page 295
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AM79C973VCW
Manufacturer Part Number
AM79C973VCW
Description
Manufacturer
AMD [Advanced Micro Devices]
Datasheet
1.AM79C973VCW.pdf
(304 pages)
- Current page: 295 of 304
- Download datasheet (3Mb)
BCR29
BCR30
BCR31
BCR32 PHY Control and Status Register .185
BCR33
BCR34
BCR35
BCR36
BCR37
BCR38
BCR39
BCR4
BCR40
BCR41
BCR42
BCR43
BCR44
BCR45
Expansion Port Address Upper
Expansion Bus Data Port Register . . . .184
Software Timer Register . . . . . . . . . . .184
PHY Address Register . . . . . . . . . . . . .187
PHY Management Data Register . . . . .187
PCI Vendor ID Register . . . . . . . . . . . .187
PCI Power Management Capabilities
PCI DATA Register Zero (DATA0)
PCI DATA Register One (DATA1)
PCI DATA Register Two (DATA2)
PCI DATA Register Zero (DATA2)
LED 0 Status . . . . . . . . . . . . . . . . . . . .164
PCI Data Register Three (DATA3)
PCI DATA Register Four (DATA4)
PCI DATA Register Five (DATA5)
PCI DATA Register Six (DATA6)
PCI DATA Register Seven (DATA7)
OnNow Pattern Matching
(Used for Flash/EPROM
Accesses) . . . . . . . . . . . . . . . . . . . .183
(PMC) Alias Register . . . . . . . . . . .188
Alias Register . . . . . . . . . . . . . . . . .188
Alias Register . . . . . . . . . . . . . . . . .188
Alias Register . . . . . . . . . . . . . . . . .189
Alias Register . . . . . . . . . . . . . . . . .189
Alias Register . . . . . . . . . . . . . . . . .189
Alias Register . . . . . . . . . . . . . . . . .189
Alias Register . . . . . . . . . . . . . . . . .190
Alias Register . . . . . . . . . . . . . . . . .190
Alias Register . . . . . . . . . . . . . . . . .191
Register #1 . . . . . . . . . . . . . . . . . . .191
P R E L I M I N A R Y
Am79C973/Am79C975
BCR46
BCR47
BCR5
BCR6
BCR7
BCR9
BLOCK DIAGRAM . . . . . . . . . . . . . . . . . . .4
Block Diagram Low Latency
Block Diagram No SRAM
Board Interface . . . . . . . . . . . . . . . . . . . . . .31
Boundary Scan Circuit . . . . . . . . . . . . . . . .106
Boundary Scan Register . . . . . . . . . . . . . .106
BSR Mode Of Operation . . . . . . . . . . . . . .107
Buffer Management . . . . . . . . . . . . . . . . . . .64
Buffer Management Unit . . . . . . . . . . . . . . .63
Buffer Size Tuning . . . . . . . . . . . . . . . . . .290
Burst FIFO DMA Transfers . . . . . . . . . . . . .62
Burst Write Transfer . . . . . . . . . . . . . . . . . .50
Bus Acquisition . . . . . . . . . . . . . . . . . . .46, 47
Bus Command and Byte Enables . . . . . . . .29
Bus Configuration Registers . . . . . . .157, 218
Bus Grant . . . . . . . . . . . . . . . . . . . . . . . . . . .29
Bus Master DMA Transfers . . . . . . . . . . . . .47
Bus Request . . . . . . . . . . . . . . . . . . . . . . . . .31
C
Carrier Sense . . . . . . . . . . . . . . . . . . . . . . . .35
CLK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .29
CLK Waveform for 3.3 V Signaling . . . . .236
CLK Waveform for 5 V Signaling . . . . . .236
CLK_FAC Values . . . . . . . . . . . . . . . . . . .183
Clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .29
Clock Interface . . . . . . . . . . . . . . . . . . . . . . .37
Clock Timing . . . . . . . . . . . . . . .227, 231, 266
COL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .35
Collision . . . . . . . . . . . . . . . . . . . . . . . . . . . .35
Collision Detect Function . . . . . . . . . . . . . .87
Collision Handling . . . . . . . . . . . . . . . . . . . .73
Receive Configuration . . . . . . . . . . . . . . .97
Configuration . . . . . . . . . . . . . . . . . . . . . .97
OnNow Pattern Matching
OnNow Pattern Matching
LED1 Status . . . . . . . . . . . . . . . . . . . . .166
LED2 Status . . . . . . . . . . . . . . . . . . . . .168
LED3 Status . . . . . . . . . . . . . . . . . . . . .169
Full-Duplex Control . . . . . . . . . . . . . . .171
Register #2 . . . . . . . . . . . . . . . . . . .191
Register #3 . . . . . . . . . . . . . . . . . . .192
295
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