ZL50073GAG2 ZARLINK [Zarlink Semiconductor Inc], ZL50073GAG2 Datasheet - Page 46

• Manufacturer Part Number: ZL50073GAG2
• Description: 32 K Channel Digital Switch with High Jitter Tolerance, Rate Conversion per Group of 4 Streams (8, 16, 32 or 64 Mbps), and 128 Inputs and 128 Outputs
• Manufacturer: ZARLINK [Zarlink Semiconductor Inc]

The Group Control Register is a static control register. Changes to bit settings may disrupt data flow on the selected
port for a maximum of 2 frames.
31
15
3 - 2
1 - 0
External Read/Write Address: 40200
0
0
Reset Value: 000C000C
Bit
30
14
0
0
ISSRC1 - 0
29
13
ISBR1 - 0
0
0
Name
28
12
0
0
H
27
11
0
0
Input Stream Bit Rate
Unused streams must be connected to ground.
If the internal system clock is used as the clock source, all the above data rates are
available. Otherwise, the data rate cannot exceed the selected clock source’s rate.
Input Stream Clock Source Select
26
10
0
0
Table 25 - Group Control Register (continued)
H
ISBR1 - 0
ISSRC1 - 0
- 4027F
25
00
01
10
ISI
11
0
9
00
01
10
11
H
ISPD
24
0
8
4
Zarlink Semiconductor Inc.
16.384 Mbps
32.768 Mbps
65.536 Mbps
8.192 Mbps
STi/oA
ISPD
ZL50073
23
7
0
3
Internal System Clock
Input Timing Source
46
CKi0 and FPi0
CKi1 and FPi1
CKi2 and FPi2
ISPD
OSI
22
6
2
16.384 Mbps
32.768 Mbps
8.192 Mbps
Description
OSBA 1 OSBA 0 OSBR 1
Not Used
ISPD
STi/oB
21
5
1
Bit Rates Per Group
ISPD
20
4
0
ISBR
16.384 Mbps
8.192 Mbps
19
3
1
Not Used
Not Used
STi/oC
OSBR 0
ISBR
18
2
0
OSSRC 1
ISSRC
16.384 Mbps
17
8.192 Mbps
1
1
Not Used
Not Used
STi/oD
Data Sheet
OSSRC 0
ISSRC
16
0
0