9DB1233AGLF IDT [Integrated Device Technology], 9DB1233AGLF Datasheet - Page 6

• Manufacturer Part Number: 9DB1233AGLF
• Description: Twelve Output Differential Buffer for PCIe Gen3
• Manufacturer: IDT [Integrated Device Technology]

IDT
TA = T
1
2
1
6 x I
2
3
differential 0V.
4
average cross point where Clock rising meets Clock# falling. The median cross point is used to calculate the voltage thresholds the
oscilloscope is to use for the edge rate calculations.
5
Clock rising and Clock# falling).
6
allowed. The intent is to limit Vcross induced modulation by setting V_cross_delta to be smaller than V_cross absolute.
TA = T
1
Electrical Characteristics - DIF 0.7V Current Mode Differential Outputs
T
Electrical Characteristics - Clock Input Parameters
Electrical Characteristics - Current Consumption
Input High Voltage - DIF_IN
Input Jitter - Cycle to Cycle
Input Low Voltage - DIF_IN
Slew rate measured through +/-75mV window centered around differential zero
Guaranteed by design and characterization, not 100% tested in production. IREF = VDD/(3xR
Guaranteed by design and characterization, not 100% tested in production.
Slew rate is measured through the Vswing voltage range centered around differential 0V. This results in a +/-150mV window around
Matching applies to rising edge rate for Clock and falling edge rate for Clock#. It is measured using a +/-75mV window centered on the
Guaranteed by design and characterization, not 100% tested in production.
Input Slew Rate - DIF_IN
A
Measured from differential waveform
Vcross is defined as voltage where Clock = Clock# measured on a component test board and only applies to the differential rising edge (i.e.
The total variation of all Vcross measurements in any particular system. Note that this is a subset of V_cross_min/max (V_cross absolute)
Operating Supply Current
Input Amplitude - DIF_IN
9DB1233
Twelve Output Differential Buffer for PCIe Gen3
®
Input Leakage Current
= T
Crossing Voltage (abs)
Input Common Mode
Crossing Voltage (var)
REF
Powerdown Current
Twelve Output Differential Buffer for PCIe Gen3
Slew rate matching
Voltage - DIF_IN
Input Duty Cycle
COM;
COM;
PARAMETER
COM;
PARAMETER
PARAMETER
and V
Voltage High
Voltage Low
Max Voltage
Min Voltage
Slew rate
Supply Voltage VDD = 3.3 V +/-5%
Vswing
Supply Voltage VDD = 3.3 V +/-5%
Supply Voltage VDD = 3.3 V +/-5%
OH
= 0.7V @ Z
O
=50 (100Ω differential impedance).
SYMBOL
SYMBOL
I
I
V
I
DD3.3PDZ
V
DD3.3OP
V
DD3.3PD
Vcross_abs
V
dv/dt
J
SWING
d
IHDIF
DIFIn
SYMBOL
ILDIF
I
∆-Vcross
COM
IN
tin
Vswing
VHigh
Vmax
VLow
Vmin
∆Trf
Trf
All outputs active @100MHz, C
Measurement from differential wavefrom
Measurement on single ended signal using absolute
using oscilloscope math function. (Scope averaging
Statistical measurement on single-ended signal
Common Mode Input Voltage
(single-ended measurement)
(single-ended measurement)
All differential pairs tri-stated
Slew rate matching, Scope averaging on
Differential Measurement
Measured differentially
V
Peak to Peak value
IN
All diff pairs driven
Differential inputs
Differential inputs
value. (Scope averaging off)
CONDITIONS
CONDITIONS
= V
Scope averaging on
Scope averaging off
Scope averaging off
Scope averaging off
DD ,
CONDITIONS
V
IN
6
= GND
on)
L
= Full load;
V
SS
R
MIN
MIN
600
300
300
0.4
45
). For R
-5
0
- 300
-150
-300
MIN
660
300
250
1
R
TYP
TYP
800
300
= 475 (1%), I
NA
21
0
TYP
800
850
2.4
20
MAX
MAX
1150
1000
1450
300
125
375
24
55
8
5
MAX UNITS NOTES
1150
850
150
550
140
20
4
REF
= 2.32mA. I
1675B—11/08/10
UNITS NOTES
UNITS NOTES
V/ns
V/ns
mV
mV
mV
mV
mA
mA
mA
mV
mV
mV
mV
mV
uA
ps
%
%
1, 2, 3
1, 2, 4
1, 2
1, 5
1, 6
1,2
OH
1
1
1
1
1
1
1
1
1
1
1
1
1
1
=