IDT72V70200PFG8 IDT, Integrated Device Technology Inc, IDT72V70200PFG8 Datasheet - Page 11

no-image

IDT72V70200PFG8

Manufacturer Part Number
IDT72V70200PFG8
Description
IC DGTL SW 512X512 3.3V 100-TQFP
Manufacturer
IDT, Integrated Device Technology Inc
Series
72Vr
Type
Multiplexerr
Datasheet

Specifications of IDT72V70200PFG8

Circuit
1 x 16:16
Independent Circuits
1
Voltage Supply Source
Single Supply
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Output High, Low
-
Lead Free Status / RoHS Status
Compliant, Lead free / RoHS Compliant
Other names
72V70200PFG8

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
IDT72V70200PFG8
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
NOTE:
1. n denotes an input stream number from 0 to 15.
IDT72V70200 3.3V TIME SLOT INTERCHANGE
DIGITAL SWITCH 512 x 5
OF112 OF111 OF110 DLE11 OF102 OF101 OF100 DLE10
OF152 OF151 OF150 DLE15 OF142 OF141 OF140 DLE14 OF132 OF131 OF130 DLE13 OF122 OF121 OF120 DLE12
OFn2, OFn1, OFn0
(Offset Bits 2, 1 & 0)
OF32
OF72
(Data Latch Edge)
Read/Write Address:
Reset Value:
15
15
15
15
Name
DLEn
OF31
OF71
14
14
14
14
(1)
OF30
OF70
13
13
13
13
These three bits define how long the serial interface receiver takes to recognize and store bit 0 from the RX input pin: i.e., to
start a new frame. The input frame offset can be selected to +4.5 clock periods from the point where the external frame pulse
input signal is applied to the F0i input of the device. See Figure 5.
ST-BUS
GCI mode:
DLE3
DLE7
12
03
04
05
06
0000
12
12
12
12
H
H
H
H
for FOR0 register,
for FOR1 register,
for FOR2 register,
for FOR3 register,
H
for all FOR registers.
®
OF22
OF62
mode:
11
11
11
11
OF21
OF61
10
10
10
10
DLEn = 0, if clock rising edge is at the ¾ point of the bit cell.
DLEn = 1, if when clock falling edge is at the ¾ of the bit cell.
DLEn = 1, if when clock rising edge is at the ¾ of the bit cell.
DLEn = 0, if clock falling edge is at the ¾ point of the bit cell.
OF20
OF60
9
9
9
9
DLE2
DLE6
8
8
8
8
FOR0 Register
FOR1 Register
FOR2 Register
FOR3 Register
OF12
OF52
OF92
7
7
7
7
11
Description
OF11
OF51
OF91
6
6
6
6
OF10
OF50
OF90
5
5
5
5
DLE1
DLE5
DLE9
4
4
4
4
OF02
OF42
OF82
COMMERCIAL TEMPERATURE RANGE
3
3
3
3
OF01
OF41
OF81
2
2
2
2
OF00
OF40
OF80
1
1
1
1
DLE0
DLE4
DLE8
0
0
0
0

Related parts for IDT72V70200PFG8