IDT72V70840DA IDT, Integrated Device Technology Inc, IDT72V70840DA Datasheet - Page 9

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IDT72V70840DA

Manufacturer Part Number
IDT72V70840DA
Description
IC DGTL SW 4096X4096 144-TQFP
Manufacturer
IDT, Integrated Device Technology Inc
Series
72Vr
Type
Multiplexerr
Datasheet

Specifications of IDT72V70840DA

Circuit
1 x 32:32
Independent Circuits
1
Voltage Supply Source
Single Supply
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
144-TQFP, 144-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Current - Output High, Low
-
Lead Free Status / RoHS Status
Not Compliant, Contains lead / RoHS non-compliant
Other names
72V70840DA

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
IDT72V70840DA
Manufacturer:
IDT
Quantity:
1 831
Part Number:
IDT72V70840DA
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
Part Number:
IDT72V70840DAG
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
NOTE:
1. n denotes an input stream number from 0 to 31.
IDT72V70840 3.3V TIME SLOT INTERCHANGE
DIGITAL SWITCH 4,096 x 4,096
OFn2, OFn1, OFn0
(Offset Bits 2, 1 & 0)
DLEn
OF112
OF312
OF192
OF232
OF272
OF312
OF32
OF72
15
15
15
15
15
15
15
15
Name
Reset Value:
OF111
OF311
OF191
OF231
OF271
OF311
OF31
OF71
(1)
14
14
14
14
14
14
14
14
OF110
OF310
OF190
OF230
OF270
OF310
OF30
OF70
13
13
13
13
13
13
13
13
Description
These three bits define how long the serial interface receiver takes to recognize and store bit 0 from the RX input pin: i.e., to start a new frame.
The input frame offset can be selected to +4.5 clock periods from the point where the external frame pulse input signal is applied to the F0i
input of the device. See Figure 1.
ST-BUS
(Data Latch Edge)
GCI mode:
DLE11
DLE31
DLE19
DLE23
DLE27
DLE31
DLE3
DLE7
0000
12
12
12
12
12
12
12
12
H
®
for all FOR registers.
mode:
OF102
OF142
OF182
OF222
OF262
OF302
OF22
OF62
11
11
11
11
11
11
11
11
OF101
OF141
OF181
OF221
OF261
OF301
OF21
OF61
10
10
10
10
10
10
10
10
DLEn = 0, if clock rising edge is at the ¾ point of the bit cell.
DLEn = 1, if when clock falling edge is at the ¾ of the bit cell.
DLEn = 0, if clock falling edge is at the ¾ point of the bit cell.
DLEn = 1, if when clock rising edge is at the ¾ of the bit cell.
OF100
OF140
OF180
OF220
OF260
OF300
OF20
OF60
9
9
9
9
9
9
9
9
DLE10
DLE14
DLE18
DLE22
DLE26
DLE30
DLE2
DLE6
8
8
8
8
8
8
8
8
FOR0 Register
FOR1 Register
FOR2 Register
FOR3 Register
FOR4 Register
FOR5 Register
FOR6 Register
FOR7 Register
OF132
OF172
OF212
OF252
OF292
OF12
OF52
OF92
7
7
7
7
7
7
7
7
9
OF131
OF171
OF211
OF251
OF291
OF11
OF51
OF91
6
6
6
6
6
6
6
6
OF130
OF170
OF210
OF250
OF290
OF10
OF50
OF90
5
5
5
5
5
5
5
5
DLE13
DLE17
DLE21
DLE25
DLE29
DLE1
DLE5
DLE9
4
4
4
4
4
4
4
4
OF122
OD162
OF202
OF242
OF282
OF02
OF42
OF82
COMMERCIAL TEMPERATURE RANGE
3
3
3
3
3
3
3
3
OF121
OD161
OF201
OF241
OF281
OF01
OF41
OF81
2
2
2
2
2
2
2
2
OF120
OF160
OF200
OF240
OF280
OF00
OF40
OF80
1
1
1
1
1
1
1
1
DLE12
DLE16
DLE20
DLE24
DLE28
DLE0
DLE4
DLE8
0
0
0
0
0
0
0
0

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