HI-3582 HOLTIC [Holt Integrated Circuits], HI-3582 Datasheet

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HI-3582

Manufacturer Part Number
HI-3582
Description
3.3V ARINC 429 TERMINAL IC
Manufacturer
HOLTIC [Holt Integrated Circuits]
Datasheet
FEATURES
GENERAL DESCRIPTION
The HI-3582/HI-3583 from Holt Integrated Circuits are
silicon gate CMOS devices for interfacing a 16-bit parallel
data bus directly to the ARINC 429 serial bus. The
HI-3582/HI-3583 design offers many enhancements to the
industry standard HI-8282 architecture. The device
provides two receivers each with label recognition, 32 by
32 FIFO, and analog line receiver. Up to 16 labels may be
programmed for each receiver. The independent transmit-
ter has a 32 X 32 FIFO and a built-in line driver. The status
of all three FIFOs can be monitored using the external
status pins, or by polling the HI-3582/HI-3583 status
register. Other new features include a programmable
option of data or parity in the 32nd bit, and the ability to
unscramble the 32 bit word. Also, versions are available
with different values of input resistance and output
resistance to allow users to more easily add external
lightning protection circuitry.
The 16-bit parallel data bus exchanges the 32-bit ARINC
data word in two steps when either loading the transmitter
or interrogating the receivers. The databus and all control
signals are CMOS and TTL compatible.
The HI-3582/HI-3583 apply the ARINC protocol to the
receivers and transmitter. Timing is based on a 1 Mega-
hertz clock.
Although the line driver shares a common substrate with
the receivers, the design of the physical isolation does not
allow parasitic crosstalk, and thereby achieves the same
isolation as common hybrid layouts.
(DS3582 Rev. F)
January 2006
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ARINC specification 429 compatible
3.3V logic supply operation
Dual receiver and transmitter interface
Analog line driver and receivers connect
directly to ARINC bus
Programmable label recognition
On-chip 16 label memory for each receiver
32 x 32 FIFOs each receiver and transmitter
Independent data rate selection for
Transmitter and each receiver
Status register
Data scramble control
32nd transmit bit can be data or parity
Self test mode
Low power
Industrial & full military temperature ranges
HOLT INTEGRATED CIRCUITS
www.holtic.com
HI-3582, HI-3583
PIN CONFIGURATIONS
(See page 14 for additional pin configuration)
APPLICATIONS
3.3V ARINC 429 TERMINAL IC
BD15 - 9
BD14 - 10
BD12 - 12
BD13 - 11
BD11 - 13
D/R2
(Note: All 3 VDD pins
EN1
EN2
HF1
HF2
SEL - 6
FF1
FF2
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Avionics data communication
Serial to parallel conversion
Parallel to serial conversion
- 1
- 2
- 3
- 4
- 5
- 7
- 8
52 - Pin Plastic Quad Flat Pack (PQFP)
BD15 - 12
BD14 - 13
BD13 - 14
BD12 - 15
BD11 - 16
D/R1
D/R2
SEL - 8
N/C - 1
EN1
EN2
HF1
HF2
FF1
FF2
N/C - 11
64 - Pin Plastic 9mm x 9mm
- 2
- 3
- 4
- 5
- 6
- 7
- 9
- 10
Chip-Scale Package
must
HI-3582PQT
HI-3583PQT
HI-3582PQI
HI-3583PQI
HI-3582PCT
HI-3583PCT
HI-3582PCI
HI-3583PCI
be connected to the same 3.3V supply)
&
&
See Note below
48
47
46 - N/C
45 - V+
44 - TXBOUT
43 - TXAOUT
42 - V-
41
40 -
39 -
38 - TX/R
37 -
36 -
35 -
34 - BD01
33 - N/C
(Top View)
-
- ENTX
- N/C
CWSTR
FFT
HFT
PL2
PL1
BD00
39 - N/C
38 -
37 - ENTX
36 - V+
35 - TXBOUT
34 - TXAOUT
33 - V-
32 -
31 -
30 - TX/R
29 -
28 -
27 - BD00
CWSTR
FFT
HFT
PL2
PL1
01/06

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HI-3582 Summary of contents

Page 1

... The databus and all control signals are CMOS and TTL compatible. The HI-3582/HI-3583 apply the ARINC protocol to the receivers and transmitter. Timing is based Mega- hertz clock. Although the line driver shares a common substrate with ...

Page 2

... INPUT CLK INPUT TX CLK OUTPUT MR INPUT TEST INPUT HI-3582, HI-3583 DESCRIPTION +3.3V power supply pin ARINC receiver 1 positive input ARINC receiver 1 negative input ARINC receiver 2 positive input ARINC receiver 2 negative input Receiver 1 data ready flag FIFO full Receiver 1 FIFO Half full, Receiver 1 ...

Page 3

... Unscramble ARINC data HI-3582, HI-3583 STATUS REGISTER The HI-3582/HI-3583 contain a 9-bit status register which can be interrogated to determine the status of the ARINC receivers, data FIFOs and transmitter. The contents of the status register are is pulsed low. The output on BD00 - BD08 when the SEL = 0 ...

Page 4

... FUNCTIONAL DESCRIPTION (cont.) ARINC 429 DATA FORMAT Control register bit CR15 is used to control how individual bits in the received or transmitted ARINC word are mapped to the HI-3582/ HI-3583 data bus during data read or write operations. The following table describes this mapping: BYTE 1 DATA ...

Page 5

... D/R FIFO LOAD CONTROL / LABEL / CONTROL DECODE BIT COMPARE LABEL MEMORY EOS ONES SHIFT REGISTER NULL SHIFT REGISTER SHIFT REGISTER ZEROS HI-3582, HI-3583 CR2(3) ARINC word CR6(9) ARINC word matches label Yes Yes Yes TO PINS CONTROL ...

Page 6

... PL2 for receiver 2. word reception is suspended during the label memory write sequence. 32 BIT PARALLEL LOAD SHIFT REGISTER FIFO DATA BUS HI-3582, HI-3583 READING LABELS D/R1 or D/R2 (or both) both After the write that changes CR1 from the next 16 data reads of the selected receiver ( ...

Page 7

... Timing is set by on-chip resistor and capacitor and tested to be within ARINC requirements. HI-3582, HI-3583 The HI-3582 has 37.5 ohms in series with each line driver output. The HI-3583 has 10 ohms in series. The HI-3583 is for applications where external series resistance is needed, typically for lightning protection devices ...

Page 8

... ARINC DATA BIT 31 BIT 32 D D/R DON'T CARE SEL EN DATA BUS t DATA BUS PL1 PL2 TX/R, FFT HFT DATA BUS CWSTR HI-3582, HI-3583 DATA RATE - EXAMPLE PATTERN DATA DATA NULL NULL BIT 32 BIT 31 RECEIVER OPERATION t t SELEN t SELEN ENSEL t t ENEN D/REN t ...

Page 9

... PL t CWSTR CWSTR EN1 or EN2 t CWHLD t CWSET DATA BUS Set CR1=1 Label #1 t ENDATA HI-3582, HI-3583 STATUS REGISTER READ CYCLE DON'T CARE t SELEN DATA VALID t ENDATA CONTROL REGISTER READ CYCLE DON'T CARE t SELEN DATA VALID t ENDATA LABEL MEMORY LOAD SEQUENCE Label #2 ...

Page 10

... TXBOUT) 10% one level RIN BIT 32 D D/R D/REN EN t SELEN SEL DON'T CARE t ENPL PL1 PL2 TXR ENTX TXAOUT TXBOUT HI-3582, HI-3583 TRANSMITTING DATA ARINC BIT ARINC BIT DATA DATA BIT 2 BIT 1 +5V -5V +5V - +10V 90 10% rx 90% ...

Page 11

... Functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. HI-3582, HI-3583 Power Dissipation at 25°C Plastic Quad Flat Pack ..................1.5 W, derate 10mW/ C Ceramic J-LEAD CERQUAD ...... 1.0 W, derate 7mW/ DC Current Drain per pin .............................................. ± ...

Page 12

... Output Voltage: Logic "1" Output Voltage Logic "0" Output Voltage Output Current: (All Outputs & Bi-directional Pins) Output Capacitance: Operating Voltage Range Operating Supply Current VDD V+ V- HI-3582, HI-3583 CONDITIONS SYMBOL ONE V Common mode voltages IH ZERO V less than ±4V with IL ...

Page 13

... Line driver transition differential times: (High Speed, control register CR13 = Logic 0) (Low Speed, control register CR13 = Logic 1) REPEATER OPERATION TIMING Delay - TX/R LOW to ENTX HIGH MASTER RESET PULSE WIDTH ARINC DATA RATE AND BIT TIMING HI-3582, HI-3583 + SYMBOL Pulse Width - CWSTR t CWSTR ...

Page 14

... ADDITIONAL HI-3582 / HI-3583 PIN CONFIGURATIONS FF1 - 8 HF1 - 9 D/ FF2 - 11 HF2 - 12 HI-3582CJI SEL - 13 HI-3582CJT EN1 - 14 EN2 -15 BD15 - 16 HI-3583CJI BD14 - 17 HI-3583CJT BD13 - 18 BD12 - 19 BD11 - Pin Cerquad J-lead (See page 1 for additional pin configuration) ORDERING INFORMATION HI - 35xx PART NUMBER No dash number ...

Page 15

... HI-3582 / HI-3583 PACKAGE DIMENSIONS 52-PIN J-LEAD CERQUAD 7 8 .040 ± .005 (1.02 ± .013) .019 ± .002 (.483 ± .051) 52-PIN PLASTIC QUAD FLAT PACK (PQFP) .520 ± .010 (13.2 ± .25) SQ. .063 ± .032 (1.6 ± .175) See Detail A .092 ± .004 (2.32 ± .12) ...

Page 16

... PLASTIC CHIP-SCALE PACKAGE 9.00 ± .10 9.00 ± .10 0.90 ± .10 HI-3582 / HI-3583 PACKAGE DIMENSIONS Heat sink stud on bottom of package Heat sink must be left floating or connected NOT connect heat sink to VDD, GND or V- 7.65 ± .15 0.40 ± .05 0.2 typ HOLT INTEGRATED CIRCUITS 16 millimeters 7.65 ± .15 0.50 0.25 typ ...

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