K9F1208U0M- SAMSUNG [Samsung semiconductor], K9F1208U0M- Datasheet - Page 12
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K9F1208U0M-
Manufacturer Part Number
K9F1208U0M-
Description
64M x 8 Bit NAND Flash Memory
Manufacturer
SAMSUNG [Samsung semiconductor]
Datasheet
1.K9F1208U0M-.pdf
(41 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
K9F1208U0M-PCB0
Manufacturer:
SAMSUNG
Quantity:
12 740
Valid Block
NOTE :
1. The
2. The 1st block, which is placed on 00h block address, is fully guaranteed to be a valid block, does not require Error Correction.
AC Test Condition
(K9F1208U0M-YCB0 :TA=0 to 70 C, K9F1208U0M-YIB0:TA=-40 to 85 C, VCC=2.7V~3.6V unless otherwise)
Capacitance
NOTE : Capacitance is periodically sampled and not 100% tested.
MODE SELECTION
NOTE : 1. X can be V
Program / Erase Characteristics
K9F1208U0M-YCB0, K9F1208U0M-YIB0
Valid Block Number
Input Pulse Levels
Input Rise and Fall Times
Input and Output Timing Levels
Output Load (3.0V +/-10%)
Output Load (3.3V +/-10%)
Input/Output Capacitance
Input Capacitance
Program Time
Dummy Busy Time for Multi Plane Program
Number of Partial Program Cycles
in the Same Page
Block Erase Time
blocks is presented with both cases of invalid blocks considered. Invalid blocks are defined as blocks that contain one or more bad bits
or program factory-marked bad blocks. Refer to the attached technical notes for an appropriate management of invalid blocks.
CLE
H
H
X
X
X
X
L
L
L
L
L
K9F1208U0M
2. WP should be biased to CMOS high or CMOS low for standby.
Parameter
Item
ALE
X
(
H
H
L
L
L
L
L
X
X
X
T
IL
(1)
Parameter
A
or V
may include invalid blocks when first shipped. Additional invalid blocks may develop while being used. The number of valid
=25 C, V
Parameter
IH.
CE
X
X
X
H
L
L
L
L
L
L
L
CC
=3.3V, f=1.0MHz)
Symbol
Symbol
C
N
C
WE
H
H
X
X
X
X
VB
I/O
Spare Array
IN
Main Array
RE
Test Condition
H
H
H
H
H
H
X
X
X
X
V
V
4,026
IN
IL
Min
Symbol
=0V
=0V
t
t
t
PROG
DBSY
Nop
BERS
12
0V/V
WP
X
X
H
H
H
X
X
H
H
L
CC
(2)
Data Input
Sequential Read & Data Output
During Read(Busy)
During Program(Busy)
During Erase(Busy)
Write Protect
Stand-by
1 TTL GATE and CL=100pF
1 TTL GATE and CL=50pF
Read Mode
Write Mode
Min
-
-
-
-
Typ.
Min
-
-
-
0.4V to 2.4V
Value
1.5V
5ns
Command Input
Address Input(4clock)
Command Input
Address Input(4clock)
Typ
200
1
2
-
-
FLASH MEMORY
4,096
Max
Max
Mode
10
10
Max
500
10
1
2
3
Blocks
.
Unit
Unit
Do not erase
pF
pF
cycles
cycle
Unit
ms
s
s