HYS6472V16200GU SIEMENS [Siemens Semiconductor Group], HYS6472V16200GU Datasheet - Page 13

• Manufacturer Part Number: HYS6472V16200GU
• Description: 3.3 V 16M x 64/72-Bit SDRAM Modules 3.3 V 32M x 64/72-Bit SDRAM Modules 3.3 V 64M x 64/72-Bit SDRAM Modules
• Manufacturer: SIEMENS [Siemens Semiconductor Group]

SPD-Table for 256MBit SDRAM based PC100 Modules (cont’d)
Byte# Description
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
Semiconductor Group
Supported CAS
Latencies
CS Latencies
WE Latencies
SDRAM DIMM module
attributes
SDRAM Device
Attributes: General
Min. Clock Cycle Time at
CAS Latency = 2
Max. data access time
from Clock for CL = 2
Minimum Clock Cycle
Time at CL = 1
Maximum Data Access
Time from Clock at
CL = 1
Minimum Row Precharge
Time
Minimum Row Active to
Row Active delay
Minimum RAS to CAS
delay
Minimum RAS pulse
width
Module Bank Density
(per bank)
SDRAM input setup time
SDRAM input hold time
SDRAM data input hold
time
SDRAM data input setup
time
t
t
RAS
RCD
t
RRD
SPD Entry
Value
CAS latency = 2
& 3
CS latency = 0
Write latency = 0 01
non buffered/
non re.
V
10.0 / 12.0 ns
6.0 / 7.0 ns
not supported
not supported
20 / 30 ns
16 / 20 ns
20 ns
50 / 60 ns
2 ns
1 ns
2 ns
1 ns
256 MByte
CC
tol
10%
13
HYS 64(72)V16200/3222(0)0/64220GU
32M 64
one bank
-8
06
01
00
06
A0
60
FF
FF
14
10
14
32
40
20
10
20
10
32M 64
one bank
-8B
06
01
01
00
06
C0
70
FF
FF
1E
14
14
3C
40
20
10
20
10
Hex
SDRAM Modules
32M 72
one bank
-8
06
01
01
00
06
A0
60
FF
FF
14
10
14
32
40
20
10
20
10
1998-08-01
32M 72
one bank
-8B
06
01
01
00
06
C0
70
FF
FF
1E
14
14
3C
40
20
10
20
10