HYS64T64020HM QIMONDA [Qimonda AG], HYS64T64020HM Datasheet - Page 6
![no-image](/images/no-image-200.jpg)
HYS64T64020HM
Manufacturer Part Number
HYS64T64020HM
Description
214-Pin Micro-DIMM-DDR2-SDRAM Modules
Manufacturer
QIMONDA [Qimonda AG]
Datasheet
1.HYS64T64020HM.pdf
(44 pages)
- Current page: 6 of 44
- Download datasheet (3Mb)
2
This chapter contains the pin configuration.
2.1
The pin configuration of the DDR2 SDRAM Micro-DIMM is listed by function in
columns Pin and Buffer Type are explained in
Rev. 1.11, 2006-11
03062006-HT1R-Z2PY
Ball No.
Clock Signals
122
194
123
195
43
147
Control Signals
165
62
163
60
56
Address Signals
55
162
46
Name
CK0
CK1
CK0
CK1
CKE0
CKE1
NC
S0
S1
NC
RAS
CAS
WE
BA0
BA1
BA2
NC
Pin Configuration
Pin Configuration
Pin
Type
I
I
I
I
I
I
NC
I
I
NC
I
I
I
I
I
I
NC
Buffer
Type
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
–
Table 6
Function
Clock Signal CK 1:0, Complementary Clock Signal CK 1:0
Clock Enables 1:0
Note: 2-rank module
Not Connected
Note: 1-rank module
Chip Select Rank 1:0
Note: 2-rank module.
Not Connected
Note: 1-rank module
Row Address Strobe (RAS), Column Address Strobe (CAS), Write
Enable (WE)
Bank Address Bus 1:0
Bank Address Bus 2
Note: Greater than 512Mb DDR2 SDRAMS
Not Connected
Note: Less than 1Gb DDR2 SDRAMS
and
Table 7
6
respectively. The pin numbering is depicted in
Table 5
HYS64T[32/64]0[0/2]0HM–[3S/3.7/5]–A
Micro-DIMM DDR2 SDRAM Modules
(214 pins). The abbreviations used in
Pin Configuration of MDIMM
Internet Data Sheet
TABLE 5
Figure
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