PSD934210JIT STMICROELECTRONICS [STMicroelectronics], PSD934210JIT Datasheet - Page 20

• Manufacturer Part Number: PSD934210JIT
• Description: Flash PSD, 3.3V Supply, for 8-bit MCUs 2 Mbit 256 Kbit Dual Flash Memories and 64 Kbit SRAM
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

PSD834F2V
Figure 5. Data Toggle Flowchart
The Error Flag (DQ5) bit is set if either an internal
time-out occurred while the embedded algorithm
attempted to program the byte, or if the MCU at-
tempted to program a 1 to a bit that was not erased
(not erased is logic 0).
It is suggested (as with all Flash memories) to read
the location again after the embedded program-
ming algorithm has completed, to compare the
byte that was written to Flash memory with the
byte that was intended to be written.
When using the Data Toggle method after an
Erase cycle, Figure 5 still applies. the Toggle Flag
(DQ6) bit toggles until the Erase cycle is complete.
A 1 on the Error Flag (DQ5) bit indicates a time-out
condition on the Erase cycle; a 0 indicates no er-
ror. The MCU can read any location within the sec-
tor being erased to get the Toggle Flag (DQ6) bit
and the Error Flag (DQ5) bit.
PSDsoft Express generates ANSI C code func-
tions which implement these Data Toggling algo-
rithms.
Unlock Bypass. The Unlock Bypass instructions
allow the system to program bytes to the Flash
memories faster than using the standard Program
instruction. The Unlock Bypass mode is entered
by first initiating two Unlock cycles. This is followed
by a third Write cycle containing the Unlock By-
pass code, 20h (as shown in Table 7).
20/89
NO
DQ5 & DQ6
READ DQ6
TOGGLE
TOGGLE
START
READ
DQ6
DQ5
DQ6
FAIL
= 1
=
=
YES
YES
YES
NO
NO
PASS
AI01370B
The Flash memory then enters the Unlock Bypass
mode. A two-cycle Unlock Bypass Program in-
struction is all that is required to program in this
mode. The first cycle in this instruction contains
the Unlock Bypass Program code, A0h. The sec-
ond cycle contains the program address and data.
Additional data is programmed in the same man-
ner. These instructions dispense with the initial
two Unlock cycles required in the standard Pro-
gram instruction, resulting in faster total Flash
memory programming.
During the Unlock Bypass mode, only the Unlock
Bypass Program and Unlock Bypass Reset Flash
instructions are valid.
To exit the Unlock Bypass mode, the system must
issue the two-cycle Unlock Bypass Reset Flash in-
struction. The first cycle must contain the data
90h; the second cycle the data 00h. Addresses are
Don’t Care for both cycles. The Flash memory
then returns to Read mode.
Erasing Flash Memory
Flash Bulk Erase. The Flash Bulk Erase instruc-
tion uses six Write operations followed by a Read
operation of the status register, as described in
Table 7. If any byte of the Bulk Erase instruction is
wrong, the Bulk Erase instruction aborts and the
device is reset to the Read Flash memory status.
During a Bulk Erase, the memory status may be
checked by reading the Error Flag (DQ5) bit, the
Toggle Flag (DQ6) bit, and the Data Polling Flag
(DQ7) bit, as detailed in the section entitled “Pro-
gramming Flash Memory”, on page 19. The Error
Flag (DQ5) bit returns a 1 if there has been an
Erase Failure (maximum number of Erase cycles
have been executed).
It is not necessary to program the memory with
00h because the PSD automatically does this be-
fore erasing to 0FFh.
During execution of the Bulk Erase instruction, the
Flash memory does not accept any instructions.
Flash Sector Erase. The Sector Erase instruc-
tion uses six Write operations, as described in Ta-
ble 7. Additional Flash Sector Erase codes and
Flash memory sector addresses can be written
subsequently to erase other Flash memory sec-
tors in parallel, without further coded cycles, if the
additional bytes are transmitted in a shorter time
than the time-out period of about 100 µs. The input
of a new Sector Erase code restarts the time-out
period.
The status of the internal timer can be monitored
through the level of the Erase Time-out Flag (DQ3)
bit. If the Erase Time-out Flag (DQ3) bit is 0, the
Sector Erase instruction has been received and
the time-out period is counting. If the Erase Time-
out Flag (DQ3) bit is 1, the time-out period has ex-
pired and the PSD is busy erasing the Flash mem-