PSD934210JIT STMICROELECTRONICS [STMicroelectronics], PSD934210JIT Datasheet - Page 52

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PSD934210JIT

Manufacturer Part Number
PSD934210JIT
Description
Flash PSD, 3.3V Supply, for 8-bit MCUs 2 Mbit 256 Kbit Dual Flash Memories and 64 Kbit SRAM
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
PSD834F2V
Figure 26. Port C Structure
Port C – Functionality and Structure
Port C can be configured to perform one or more
of the following functions (see Figure 26):
52/89
MCU I/O Mode
CPLD Output – McellBC7-McellBC0 outputs
can be connected to Port B or Port C.
CPLD Input – via the Input Macrocells (IMC)
Address In – Additional high address inputs
using the Input Macrocells (IMC).
In-System Programming (ISP) – JTAG port can
be enabled for programming/erase of the PSD
device. (See the section entitled “Programming
In-Circuit using the JTAG Serial Interface”, on
MCELLBC [ 7:0 ]
ENABLE PRODUCT TERM ( .OE )
WR
WR
CPLD-INPUT
READ MUX
DATA OUT
DIR REG.
D
D
REG.
P
D
B
Q
Q
DATA IN
SPECIAL FUNCTION
DATA OUT
Port C does not support Address Out mode, and
therefore no Control Register is required.
Pin PC7 may be configured as the DBE input in
certain MCU bus interfaces.
page 61, for more information on JTAG
programming.)
Open Drain – Port C pins can be configured in
Open Drain Mode
Battery Backup features – PC2 can be
configured for a battery input supply, Voltage
Stand-by (VSTBY).
PC4 can be configured as a Battery-on Indicator
(VBATON), indicating when V
V
1
BAT
SPECIAL FUNCTION
.
OUTPUT
OUTPUT
SELECT
MUX
ENABLE OUT
MACROCELL
1
INPUT
CONFIGURATION
PORT C PIN
CC
BIT
is less than
AI02888B

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