KMM374S403CT SAMSUNG [Samsung semiconductor], KMM374S403CT Datasheet - Page 8

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KMM374S403CT

Manufacturer Part Number
KMM374S403CT
Description
PC100 SDRAM MODULE
Manufacturer
SAMSUNG [Samsung semiconductor]
Datasheet
KMM374S403CT
Note :
AC CHARACTERISTICS
Refer to the individual componenet, not the whole module.
CLK cycle time
CLK to valid
output delay
Output data
hold time
CLK high pulse width
CLK low pulse width
Input setup time
Input hold time
CLK to output in Low-Z
CLK to output
in Hi-Z
1. Parameters depend on programmed CAS latency.
2. If clock rising time is longer than 1ns, (tr/2-0.5)ns should be added to the parameter.
3. Assumed input rise and fall time (tr & tf)=1ns.
If tr & tf is longer than 1ns, transient time compensation should be considered,
i.e., [(tr + tf)/2-1]ns should be added to the parameter.
Parameter
CAS Latency=3
CAS Latency=2
CAS Latency=3
CAS Latency=2
CAS Latency=3
CAS Latency=2
CAS Latency=3
CAS Latency=2
(AC operating conditions unless otherwise noted)
Symbol
t
t
t
t
t
t
SAC
t
t
t
SHZ
SLZ
OH
CC
CH
SS
SH
CL
Min
12
8
3
3
3
3
2
1
1
-8
1000
Max
6
6
6
6
Min
10
10
3
3
3
3
2
1
1
-H
1000
Max
PC100 SDRAM MODULE
6
6
6
6
Min
10
12
3
3
3
3
2
1
1
-L
1000
Max
6
7
6
7
REV. 1 Mar. '98
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
Note
1, 2
1
2
3
3
3
3
2

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