MF1ICS2005 NXP [NXP Semiconductors], MF1ICS2005 Datasheet
MF1ICS2005
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MF1ICS2005 Summary of contents
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... IC coil design guide” and is qualified to work properly in NXP´ reader environment, which is built according to NXP´ specification. This specification describes electrical, physical and dimensional properties of wafers. 2. Ordering information Table 1. Type number MF1ICS2005W/U7D 3. Mechanical specification 3.1 Wafer • Diameter: • ...
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NXP Semiconductors • Thickness: 3.5 Au bump • Bump material: • Bump hardness: • Bump shear strength: • Bump height: • Bump height uniformity: – within a die: – within a wafer: – wafer to wafer: • Bump flatness: • ...
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NXP Semiconductors 4. Limiting values Table 2. In accordance with the Absolute Maximum Rating System (IEC 134) Symbol TOT T STOR ESD I LU [1] Stresses above one or more of the limiting values ...
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... Fig 1. Chip orientation and bond pad locations 141130 Product data sheet Y (5) (6) LA TESTIO VSS MF1ICS2005 (3) (5) LA bump edge to chip edge, y-length: 80 µm (6) LA bump edge to chip edge, x-length: 80 µm (7) LB bump edge to chip edge, y-length: 1.11 mm (8) LB bump edge to chip edge, x-length: 1.06 mm Rev. 3.0 — ...
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NXP Semiconductors 7. References • Data sheet “General wafer specification for 8” wafers” • Data sheet “Standard card IC MF1 IC S50 memory contents after test” • Data sheet “Standard card IC MF1 IC S50 functional Specification” • Product qualification ...
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NXP Semiconductors 9. Legal information 9.1 Data sheet status [1][2] Document status Product status Objective [short] data sheet Development Preliminary [short] data sheet Qualification Product [short] data sheet Production [1] Please consult the most recently issued document before initiating or ...
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NXP Semiconductors 11. Tables Table 1. Ordering information . . . . . . . . . . . . . . . . . . . . .1 [1][2][3] Table 2. Limiting values . . . . . . ...