H5TQ1G43BFR HYNIX [Hynix Semiconductor], H5TQ1G43BFR Datasheet - Page 19
H5TQ1G43BFR
Manufacturer Part Number
H5TQ1G43BFR
Description
1Gb DDR3 SDRAM
Manufacturer
HYNIX [Hynix Semiconductor]
Datasheet
1.H5TQ1G43BFR.pdf
(32 pages)
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Table 3 - IDD0 Measurement-Loop Pattern
a) DM must be driven LOW all the time. DQS, DQS are MID-LEVEL.
b) DQ signals are MID-LEVEL.
Rev. 1.0 / Dec. 2009
0
1
2
3
4
5
6
7
0
1,2
3,4
...
nRAS
...
1*nRC+0
1*nRC+1, 2
1*nRC+3, 4
...
1*nRC+nRAS
...
2*nRC
4*nRC
6*nRC
8*nRC
10*nRC
12*nRC
14*nRC
repeat pattern 1...4 until nRAS - 1, truncate if necessary
repeat pattern 1...4 until nRC - 1, truncate if necessary
repeat pattern 1...4 until 1*nRC + nRAS - 1, truncate if necessary
repeat pattern 1...4 until 2*nRC - 1, truncate if necessary
repeat Sub-Loop 0, use BA[2:0] = 1 instead
repeat Sub-Loop 0, use BA[2:0] = 2 instead
repeat Sub-Loop 0, use BA[2:0] = 3 instead
repeat Sub-Loop 0, use BA[2:0] = 4 instead
repeat Sub-Loop 0, use BA[2:0] = 5 instead
repeat Sub-Loop 0, use BA[2:0] = 6 instead
repeat Sub-Loop 0, use BA[2:0] = 7 instead
D, D
D, D
D, D
D, D
ACT
PRE
ACT
PRE
0
1
1
0
1
0
1
0
0
0
1
0
0
0
1
0
1
0
1
1
1
0
1
1
a)
1
0
1
0
1
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
00
00
00
00
00
00
00
00
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
F
F
F
F
0
0
0
0
0
0
0
0
Data
-
-
-
-
-
-
-
-
b)
19
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