ADE7566ASTZF8-RL2 AD [Analog Devices], ADE7566ASTZF8-RL2 Datasheet - Page 21

• Manufacturer Part Number: ADE7566ASTZF8-RL2
• Description: Single-Phase Energy Measurement IC with 8052 MCU, RTC, and LCD Driver
• Manufacturer: AD [Analog Devices]

Preliminary Technical Data
TERMINOLOGY
Measurement Error
The error associated with the energy measurement made by the
ADE7566/ADE7569 is defined by the following formula:
Phase Error Between Channels
The digital integrator and the high-pass filter (HPF) in the
current channel have a non-ideal phase response. To offset this
phase response and equalize the phase response between
channels, two phase-correction networks are placed in the
current channel: one for the digital integrator and the other for
the HPF. The phase correction networks correct the phase
response of the corresponding component, and ensure a phase
match between current channel and voltage channel to within
±0.1° over a range of 45 Hz to 65 Hz with the digital integrator
off. With the digital integrator on, the phase is corrected to
within ±0.4° over a range of 45 Hz to 65 Hz.
Power Supply Rejection (PSR)
This quantifies the ADE7566/ADE7569 measurement error as a
percentage of reading when the power supplies are varied. For
the ac PSR measurement, a reading at nominal supplies (3.3 V)
is taken. A second reading is obtained with the same input signal
levels when an ac (100 mV rms/120 Hz) signal is introduced onto
the supplies. Any error introduced by this ac signal is expressed
as a percentage of reading (see the Measurement Error definition).
Percentage
Error
=
⎛
⎜
⎜
⎝
Energy
Register
True
Energy
−
True
Energy
⎞
⎟
⎟
⎠
×
Rev. PrA | Page 21 of 136
100
%
For the dc PSR measurement, a reading at nominal supplies
(3.3 V) is taken. A second reading is obtained with the same
input signal levels when the supplies are varied ±5%. Any error
introduced is again expressed as a percentage of the reading.
ADC Offset Error
This is the dc offset associated with the analog inputs to the
ADCs. It means that with the analog inputs connected to
AGND, the ADCs still see a dc analog input signal. The
magnitude of the offset depends on the gain and input range
selection (see the Typical Performance Characteristics section).
However, when HPF1 is switched on, the offset is removed from
the current channel and the power calculation is not affected by
this offset. The offsets can be removed by performing an offset
calibration (see the Analog Inputs section).
Gain Error
Gain Error is the difference between the measured ADC output
code (minus the offset) and the ideal output code (see the
Current Channel ADC and Voltage Channel ADC sections). It
is measured for each of the gain setting on the current channel
(1, 2, 4, 8, and 16). The difference is expressed as a percentage
of the ideal code.
ADE7566/ADE7569