LC89075W-H SANYO [Sanyo Semicon Device], LC89075W-H Datasheet - Page 43

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LC89075W-H

Manufacturer Part Number
LC89075W-H
Description
Digital Audio Interface Receiver with Stereo ADC and Audio Selector
Manufacturer
SANYO [Sanyo Semicon Device]
Datasheet
14.2 Random Address Access Mode
• Random address access mode reads and writes the data for an arbitrary address.
• A single address is processed for each command.
• The write data is loaded at the rising edge of the SCK immediately prior to the rising edge of CSB.
• A total of two bytes of address and data are executed for each input command, but when the SCK serial clock is input
• Eight bits of data are read after the address setting for each output command. Like the input command, when SCK
for 3 bytes or more, write is executed in the same manner as the previously described current address access mode.
Note that in this case, the address is incremented and data is rewritten.
input continues while CSB is “L”, read is executed in the same manner as current address access mode.
CSB
SCK
CSB
SCK
SO
SO
SI
SI
= 1
= 0
R/W
R/W
Hi-Z
Hi-Z
0
0
0
0
Figure 14.5 Random Address Access Mode Output Timing Diagram
Figure 14.4 Random Address Access Mode Input Timing Diagram
A4
A4
A3
A3
A2
A2
A1
A1
A0
A0
MSB
MSB
D7
D7
D6
D6
LC89075W-H
D5
D5
D4
D4
D3
D3
D2
D2
D1
D1
LSB
LSB
D0
D0
R/W
R/W
0
0
0
0
Hi-Z
A4
A4
A3
A3
A2
A2
A1
A1
No.A1858-43/69
A0
A0
D7
D7
D6
D6

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